专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09542248B2 Dispatching function calls across accelerator devices 有权
标题翻译：调度功能调用加速器设备
公开(公告)号：US09542248B2
公开(公告)日：2017-01-10
申请号：US14667009
申请日：2015-03-24
申请人： International Business Machines Corporation
发明人： Arpith C. Jacob , Olivier H. Sallenave
IPC分类号： G06F3/00 , G06F9/44 , G06F9/46 , G06F13/00 , G06F9/54
CPC分类号： G06F9/485 , G06F9/466 , G06F9/54 , G06F9/547
摘要： In one embodiment, a computer-implemented method for dispatching a function call includes receiving, at a supervisor processing element (PE) and from an origin PE, an identifier of a target device, a stack frame of the origin PE, and an address of a function called from the origin PE. The supervisor PE allocates a target PE of the target device. The supervisor PE copies the stack frame of the origin PE to a new stack frame on a call stack of the target PE. The supervisor PE instructs the target PE to execute the function. The supervisor PE receives a notification that execution of the function is complete. The supervisor PE copies the stack frame of the target PE to the stack frame of the origin PE. The supervisor PE releases the target PE of the target device. The supervisor PE instructs the origin PE to resume execution of the program.
摘要翻译：在一个实施例中，一种用于调度功能呼叫的计算机实现的方法包括在主管处理元件（PE）处和从源PE接收目标设备的标识符，原始PE的堆栈帧以及源PE的地址从原始PE调用的函数。主管PE分配目标设备的目标PE。主管PE将原始PE的堆叠帧复制到目标PE的调用堆栈上的新堆栈帧。主管PE指示目标PE执行该功能。主管PE接收到该功能的执行完成的通知。主管PE将目标PE的堆叠帧复制到原始PE的堆叠帧。主管PE释放目标设备的目标PE。主管PE指示原始PE恢复执行该程序。

2. 发明授权

US09563428B2 Schedulers with load-store queue awareness 有权
公开(公告)号：US09563428B2
公开(公告)日：2017-02-07
申请号：US14669472
申请日：2015-03-26
申请人： International Business Machines Corporation
发明人： Tong Chen , Alexandre E. Eichenberger , Arpith C. Jacob , Zehra N. Sura
IPC分类号： G06F9/38 , G06F9/30
CPC分类号： G06F9/3842 , G06F8/4434 , G06F8/4451 , G06F9/30043 , G06F9/48
摘要： In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

3. 发明授权

US09552196B2 Schedulers with load-store queue awareness 有权
标题翻译：具有加载存储队列意识的调度程序
公开(公告)号：US09552196B2
公开(公告)日：2017-01-24
申请号：US14744051
申请日：2015-06-19
申请人： International Business Machines Corporation
发明人： Tong Chen , Alexandre E. Eichenberger , Arpith C. Jacob , Zehra N. Sura
IPC分类号： G06F9/38 , G06F9/30 , G06F9/45
CPC分类号： G06F9/3842 , G06F8/4434 , G06F8/4451 , G06F9/30043 , G06F9/48
摘要： In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.
摘要翻译：在一个实施例中，计算机实现的方法包括在程序的编译期间跟踪加载存储队列（LSQ）的大小。 LSQ的大小是随时间变化的，并指示程序在LSQ上有多少内存访问指令。该方法还包括由计算机处理器基于LSQ的大小来调度程序的多个存储器访问指令。

4. 发明授权

US09116738B2 Method and apparatus for efficient execution of concurrent processes on a multithreaded message passing system 有权
标题翻译：用于在多线程消息传递系统上有效执行并发进程的方法和装置
公开(公告)号：US09116738B2
公开(公告)日：2015-08-25
申请号：US13675099
申请日：2012-11-13
申请人： International Business Machines Corporation
发明人： Arpith C. Jacob , Jude A. Rivers
IPC分类号： G06F9/46 , G06F9/44 , G06F9/48
CPC分类号： G06F9/46 , G06F8/314 , G06F9/4881 , G06F2209/483 , Y02D10/24
摘要： A graph analytics appliance can be employed to extract data from a graph database in an efficient manner. The graph analytics appliance includes a router, a worklist scheduler, a processing unit, and an input/output unit. The router receives an abstraction program including a plurality of parallel algorithms for a query request from an abstraction program compiler residing on computational node or the graph analytics appliance. The worklist scheduler generates a prioritized plurality of parallel threads for executing the query request from the plurality of parallel algorithms. The processing unit executes multiple threads selected from the prioritized plurality of parallel threads. The input/output unit communicates with a graph database.
摘要翻译：可以使用图形分析设备以有效的方式从图形数据库中提取数据。图形分析设备包括路由器，工作列表调度器，处理单元和输入/输出单元。路由器接收抽象程序，其包括来自驻留在计算节点或图形分析设备上的抽象程序编译器的查询请求的多个并行算法。工作列表调度器生成用于从多个并行算法执行查询请求的优先级多个并行线程。处理单元执行从优先级多个并行线程中选择的多个线程。输入/输出单元与图形数据库通信。

5. 发明申请

US20160283297A1 DISPATCHING FUNCTION CALLS ACROSS ACCELERATOR DEVICES 有权
公开(公告)号：US20160283297A1
公开(公告)日：2016-09-29
申请号：US14667009
申请日：2015-03-24
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Arpith C. Jacob , Olivier H. Sallenave
IPC分类号： G06F9/54 , G06F9/46
CPC分类号： G06F9/485 , G06F9/466 , G06F9/54 , G06F9/547
摘要： In one embodiment, a computer-implemented method for dispatching a function call includes receiving, at a supervisor processing element (PE) and from an origin PE, an identifier of a target device, a stack frame of the origin PE, and an address of a function called from the origin PE. The supervisor PE allocates a target PE of the target device. The supervisor PE copies the stack frame of the origin PE to a new stack frame on a call stack of the target PE. The supervisor PE instructs the target PE to execute the function. The supervisor PE receives a notification that execution of the function is complete. The supervisor PE copies the stack frame of the target PE to the stack frame of the origin PE. The supervisor PE releases the target PE of the target device. The supervisor PE instructs the origin PE to resume execution of the program.

6. 发明申请

US20140137130A1 METHOD AND APPARATUS FOR EFFICIENT EXECUTION OF CONCURRENT PROCESSES ON A MULTITHREADED MESSAGE PASSING SYSTEM 审中-公开
公开(公告)号：US20140137130A1
公开(公告)日：2014-05-15
申请号：US13687702
申请日：2012-11-28
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Arpith C. Jacob , Jude A. Rivers
IPC分类号： G06F9/46
CPC分类号： G06F9/46 , G06F8/314 , G06F9/4881 , G06F2209/483 , Y02D10/24
摘要： A graph analytics appliance can be employed to extract data from a graph database in an efficient manner. The graph analytics appliance includes a router, a worklist scheduler, a processing unit, and an input/output unit. The router receives an abstraction program including a plurality of parallel algorithms for a query request from an abstraction program compiler residing on computational node or the graph analytics appliance. The worklist scheduler generates a prioritized plurality of parallel threads for executing the query request from the plurality of parallel algorithms. The processing unit executes multiple threads selected from the prioritized plurality of parallel threads. The input/output unit communicates with a graph database.

7. 发明授权

US10572263B2 Executing a composite VLIW instruction having a scalar atom that indicates an iteration of execution 有权
公开(公告)号：US10572263B2
公开(公告)日：2020-02-25
申请号：US15086947
申请日：2016-03-31
申请人： International Business Machines Corporation
发明人： Bruce M. Fleischer , Thomas Winters Fox , Arpith C. Jacob , Hans Mikael Jacobson , Ravi Nair , Kevin John Patrick O'Brien , Daniel Arthur Prener
IPC分类号： G06F9/38 , G06F9/30
摘要： A processor core includes a storage device which stores a composite very large instruction word (VLIW) instruction, an instruction unit which obtains the composite VLIW instruction from the storage device and decodes the composite VLIW instruction to determine an operation to perform, and a composite VLIW instruction execution unit which executes the decoded composite VLIW instruction to perform the operation.

8. 发明申请

US20160283264A1 DISPATCHING FUNCTION CALLS ACROSS ACCELERATOR DEVICES 有权
标题翻译：通过加速器设备分配功能调用
公开(公告)号：US20160283264A1
公开(公告)日：2016-09-29
申请号：US14744048
申请日：2015-06-19
申请人： International Business Machines Corporation
发明人： Arpith C. Jacob , Olivier H. Sallenave
IPC分类号： G06F9/48 , G06F9/54
CPC分类号： G06F9/485 , G06F9/466 , G06F9/54 , G06F9/547
摘要： In one embodiment, a computer-implemented method for dispatching a function call includes receiving, at a supervisor processing element (PE) and from an origin PE, an identifier of a target device, a stack frame of the origin PE, and an address of a function called from the origin PE. The supervisor PE allocates a target PE of the target device. The supervisor PE copies the stack frame of the origin PE to a new stack frame on a call stack of the target PE. The supervisor PE instructs the target PE to execute the function. The supervisor PE receives a notification that execution of the function is complete. The supervisor PE copies the stack frame of the target PE to the stack frame of the origin PE. The supervisor PE releases the target PE of the target device. The supervisor PE instructs the origin PE to resume execution of the program.
摘要翻译：在一个实施例中，一种用于调度功能呼叫的计算机实现的方法包括在主管处理元件（PE）处和从源PE接收目标设备的标识符，原始PE的堆栈帧以及源PE的地址从原始PE调用的函数。主管PE分配目标设备的目标PE。主管PE将原始PE的堆叠帧复制到目标PE的调用堆栈上的新堆栈帧。主管PE指示目标PE执行该功能。主管PE接收到该功能的执行完成的通知。主管PE将目标PE的堆叠帧复制到原始PE的堆叠帧。主管PE释放目标设备的目标PE。主管PE指示原始PE恢复执行该程序。

9. 发明申请

US20160283212A1 SCHEDULERS WITH LOAD-STORE QUEUE AWARENESS 有权
公开(公告)号：US20160283212A1
公开(公告)日：2016-09-29
申请号：US14744051
申请日：2015-06-19
申请人： International Business Machines Corporation
发明人： Tong Chen , Alexandre E. Eichenberger , Arpith C. Jacob , Zehra N. Sura
IPC分类号： G06F9/45
CPC分类号： G06F9/3842 , G06F8/4434 , G06F8/4451 , G06F9/30043 , G06F9/48
摘要： In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

10. 发明授权

US09122513B2 Method and apparatus for efficient execution of concurrent processes on a multithreaded message passing system 有权
公开(公告)号：US09122513B2
公开(公告)日：2015-09-01
申请号：US13687702
申请日：2012-11-28
申请人： International Business Machines Corporation
发明人： Arpith C. Jacob , Jude A. Rivers
IPC分类号： G06F9/46 , G06F9/44 , G06F9/48
CPC分类号： G06F9/46 , G06F8/314 , G06F9/4881 , G06F2209/483 , Y02D10/24
摘要： A graph analytics appliance can be employed to extract data from a graph database in an efficient manner. The graph analytics appliance includes a router, a worklist scheduler, a processing unit, and an input/output unit. The router receives an abstraction program including a plurality of parallel algorithms for a query request from an abstraction program compiler residing on computational node or the graph analytics appliance. The worklist scheduler generates a prioritized plurality of parallel threads for executing the query request from the plurality of parallel algorithms. The processing unit executes multiple threads selected from the prioritized plurality of parallel threads. The input/output unit communicates with a graph database.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式