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1. 发明授权

US10831539B2 Hardware thread switching for scheduling policy in a processor 有权
公开(公告)号：US10831539B2
公开(公告)日：2020-11-10
申请号：US16356348
申请日：2019-03-18
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Chad Collie , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F9/46 , G06F9/50 , G06F9/48 , H04N1/00 , G06F9/455
摘要： Examples of techniques for hardware thread switching for scheduling policy in a processor are described herein. An aspect includes, based on receiving a request from a first software thread to dispatch to a first hardware thread, determining that the first hardware thread is occupied by a second software thread that has a higher priority than the first software thread. Another aspect includes issuing an interrupt to switch the second software thread from the first hardware thread to a second hardware thread. Another aspect includes, based on switching of the second software thread from the first hardware thread to the second hardware thread, dispatching the first software thread to the first hardware thread.

2. 发明授权

US10108453B2 Averting lock contention associated with core-based hardware threading in a split core environment 有权
公开(公告)号：US10108453B2
公开(公告)日：2018-10-23
申请号：US15199258
申请日：2016-06-30
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F9/46 , G06F9/48 , G06F11/30
摘要： Techniques are disclosed for managing lock contention in a multithreaded processing system. In one embodiment, a method includes tracking a current total amount of time that one or more software threads are prevented from execution due to a lock, a current utilization of one or more hardware threads in the processor, and a current number of dispatchable software threads. If the current total amount of time exceeds a predetermined threshold, the method includes performing a comparison of the current total amount of time, the current utilization, and the current number of dispatchable software threads to one or more past measurements. Based on the comparison, the method includes determining if reducing a number of active hardware threads will reduce a wait time. If reducing the number of active hardware threads will reduce the wait time, reducing the number of active hardware threads.

3. 发明授权

US10019392B2 Preventing software thread blocking due to interrupts 有权
公开(公告)号：US10019392B2
公开(公告)日：2018-07-10
申请号：US14737359
申请日：2015-06-11
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F13/24 , G06F9/48
CPC分类号： G06F13/24 , G06F9/4881
摘要： According to one exemplary embodiment, a method for preventing a software thread from being blocked due to processing an external device interrupt is provided. The method may include receiving the software thread, whereby the software thread has an associated interrupt avoidance variable. The method may also include determining a processor to receive the software thread. The method may then include sending the software thread to the determined processor. The method may further include setting an interrupt mask bit associated with the processor based on the interrupt avoidance variable. The method may also include receiving the external device interrupt. The method may then include redirecting the received external device interrupt to a second processor, whereby the redirecting is based on the interrupt mask bit.

4. 发明授权

US09460101B2 Management of file cache 有权
公开(公告)号：US09460101B2
公开(公告)日：2016-10-04
申请号：US14098061
申请日：2013-12-05
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F12/12 , G06F17/30 , G06F12/08
CPC分类号： G06F17/30132 , G06F12/0891 , G06F12/126 , G06F12/127 , G06F17/30067 , G06F2212/463
摘要： A method and computer program product for managing a file cache with a filesystem cache manager is disclosed. The method may include installing the filesystem cache manager for the file cache by a mount command. The filesystem cache manager may include a specified time interval and a first cache elimination instruction. The method may further include starting a first timer upon the installation of the filesystem cache manager. The method may further include running the first cache elimination instruction when the first timer reaches the specified time interval.

5. 发明申请

US20210132944A1 OPTIMIZATION OF LOW-LEVEL MEMORY OPERATIONS IN A NUMA ENVIRONMENT 有权
公开(公告)号：US20210132944A1
公开(公告)日：2021-05-06
申请号：US16673400
申请日：2019-11-04
申请人： International Business Machines Corporation
发明人： William F. Quinn , Anil Kalavakolanu , DOUGLAS GRIFFITH , SREENIVAS MAKINEEDI , Mathew Accapadi
IPC分类号： G06F9/30 , G06F9/50 , G06F9/48 , G06F12/02 , G06F11/30
摘要： A method for optimization of low-level memory operations in a distributed memory storage configuration that includes receiving, at a first processor, a request to migrate data from the first processor to a second processor, where the first processor and the second processor comprise a processor and memory, and identifying a command instruction associated with the requested data. The method also includes comparing a first performance metric associated with the first processor to a second performance metric associated with the second processor, where the first performance metric and the second performance metric are associated with executing the command instruction, and where, based on the comparing, a decision to move the command instruction to the second processor is formed, and migrating, responsive to the decision, the data and the command instruction to the second processor.

6. 发明申请

US20200301735A1 HARDWARE THREAD SWITCHING FOR SCHEDULING POLICY IN A PROCESSOR 审中-公开
公开(公告)号：US20200301735A1
公开(公告)日：2020-09-24
申请号：US16356348
申请日：2019-03-18
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Chad Collie , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F9/48
摘要： Examples of techniques for hardware thread switching for scheduling policy in a processor are described herein. An aspect includes, based on receiving a request from a first software thread to dispatch to a first hardware thread, determining that the first hardware thread is occupied by a second software thread that has a higher priority than the first software thread. Another aspect includes issuing an interrupt to switch the second software thread from the first hardware thread to a second hardware thread. Another aspect includes, based on switching of the second software thread from the first hardware thread to the second hardware thread, dispatching the first software thread to the first hardware thread.

7. 发明授权

US09928157B2 Filtering multiple in-memory trace buffers for event ranges before dumping from memory 有权
公开(公告)号：US09928157B2
公开(公告)日：2018-03-27
申请号：US14552942
申请日：2014-11-25
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F11/36
CPC分类号： G06F11/3636
摘要： A method for filtering multiple in-memory trace buffers for event ranges is provided. The method includes allocating a plurality of main trace buffers, based on the number of central processing units (CPU) participating in a trace. Each CPU has a dedicated main trace buffer, and each main trace buffer is circular. Each main trace buffer is divided into an equal number of sub-buffers. A plurality of events is written to the current sub-buffer. When the current sub-buffer is filled, events are written to the next sub-buffer. Events are extracted from at least one of the sub-buffers, starting with the sub-buffer that includes a compare time and ending at the end of the main trace buffer.

8. 发明授权

US09465807B2 Management of file cache 有权
标题翻译：管理文件缓存
公开(公告)号：US09465807B2
公开(公告)日：2016-10-11
申请号：US14057716
申请日：2013-10-18
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F17/30 , G06F12/08 , G06F12/12
CPC分类号： G06F17/30132 , G06F12/0891 , G06F12/126 , G06F12/127 , G06F17/30067 , G06F2212/463
摘要： A method and computer program product for managing a file cache with a filesystem cache manager is disclosed. The method may include installing the filesystem cache manager for the file cache by a mount command. The filesystem cache manager may include a specified time interval and a first cache elimination instruction. The method may further include starting a first timer upon the installation of the filesystem cache manager. The method may further include running the first cache elimination instruction when the first timer reaches the specified time interval.
摘要翻译：公开了一种用于使用文件系统高速缓存管理器来管理文件高速缓存的方法和计算机程序产品。该方法可以包括通过安装命令安装用于文件高速缓存的文件系统高速缓存管理器。文件系统高速缓存管理器可以包括指定的时间间隔和第一高速缓存消除指令。该方法还可以包括在安装文件系统高速缓存管理器时启动第一定时器。该方法还可以包括当第一定时器到达指定的时间间隔时运行第一高速缓存消除指令。

9. 发明申请

US20160147653A1 FILTERING MULTIPLE IN-MEMORY TRACE BUFFERS FOR EVENT RANGES BEFORE DUMPING FROM MEMORY 有权
标题翻译：在从存储器中删除事件范围之前过滤多个内存跟踪缓冲区
公开(公告)号：US20160147653A1
公开(公告)日：2016-05-26
申请号：US14552942
申请日：2014-11-25
申请人： International Business Machines Corporation
发明人： Mathew Accapadi , Grover C. Davidson, II , Dirk Michel , Bret R. Olszewski
IPC分类号： G06F12/06
CPC分类号： G06F11/3636
摘要： A method for filtering multiple in-memory trace buffers for event ranges is provided. The method includes allocating a plurality of main trace buffers, based on the number of central processing units (CPU) participating in a trace. Each CPU has a dedicated main trace buffer, and each main trace buffer is circular. Each main trace buffer is divided into an equal number of sub-buffers. A plurality of events is written to the current sub-buffer. When the current sub-buffer is filled, events are written to the next sub-buffer. Events are extracted from at least one of the sub-buffers, starting with the sub-buffer that includes a compare time and ending at the end of the main trace buffer.
摘要翻译：提供了一种过滤用于事件范围的多个内存中跟踪缓冲区的方法。该方法包括基于参与跟踪的中央处理单元（CPU）的数量分配多个主跟踪缓冲器。每个CPU都有一个专用的主跟踪缓冲区，每个主跟踪缓冲区是循环的。每个主跟踪缓冲区被分成相等数量的子缓冲区。多个事件被写入当前子缓冲器。当当前子缓冲区被填满时，事件被写入下一个子缓冲区。从至少一个子缓冲器提取事件，从包括比较时间并在主跟踪缓冲器的末尾结束的子缓冲器开始。

10. 发明授权

US09195601B2 Selective release-behind of pages based on repaging history in an information handling system 有权
标题翻译：根据信息处理系统中的重新记录历史，选择性地发布页面
公开(公告)号：US09195601B2
公开(公告)日：2015-11-24
申请号：US13685692
申请日：2012-11-26
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Mathew Accapadi , Grover C Davidson, II , Dirk Michel , Bret R Olszewski
IPC分类号： G06F12/08
CPC分类号： G06F12/0817 , G06F12/0891 , G06F12/121 , G06F17/30082 , G06F17/30132
摘要： An information handling system (IHS) includes an operating system with a release-behind component that determines which file pages to release from a file cache in system memory. The release-behind component employs a history buffer to determine which file pages to release from the file cache to create room for a current page access. The history buffer stores entries that identify respective pages for which a page fault occurred. For each identified page, the history buffer stores respective repage information that indicates if a repage fault occurred for such page. The release-behind component identifies a candidate previous page for release from the file cache. The release-behind component checks the history buffer to determine if a repage fault occurred for that entry. If so, then the release-behind component does not discard the candidate previous page from the cache. Otherwise, the release-behind component discards the candidate previous page if a repage fault occurred.
摘要翻译：信息处理系统（IHS）包括具有释放组件的操作系统，其确定从系统存储器中的文件高速缓存释放哪些文件页面。释放组件使用历史缓冲区来确定要从文件高速缓存释放的文件页面，以创建当前页面访问的空间。历史缓冲器存储标识出现页面错误的各个页面的条目。对于每个识别的页面，历史缓冲器存储指示是否发生这种页面的重新排列故障的相应的重新分配信息。释放组件标识从文件缓存释放的候选上一页。 release-behind组件检查历史缓冲区以确定该条目是否发生repage故障。如果是这样，则释放后端组件不会将缓存中的候选上一页丢弃。否则，如果出现发生故障，则释放后端组件会丢弃候选的上一页。

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