专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08635412B1 Inter-processor communication 有权
标题翻译：处理器间通信
公开(公告)号：US08635412B1
公开(公告)日：2014-01-21
申请号：US13167010
申请日：2011-06-23
申请人： James C. Wilshire
发明人： James C. Wilshire
IPC分类号： G06F12/00
CPC分类号： G06F13/28 , G06F15/167
摘要： A multi-processor system is disclosed comprising a first processor, a first memory coupled to the first processor, a second processor, and a shared memory subsystem including a shared memory and a data transfer unit. The first processor is configured to build a data structure in the first memory and to send a direct memory access (DMA) transfer request to the data transfer unit of the shared memory subsystem, the DMA transfer request including an address of the data structure in the first memory. The data transfer unit is configured to retrieve the data structure from the first memory based on the DMA transfer request, to store the data structure in the shared memory, and to send a shared memory pointer to the second processor indicating an address of the data structure in the shared memory.
摘要翻译：公开了一种多处理器系统，包括第一处理器，耦合到第一处理器的第一存储器，第二处理器和包括共享存储器和数据传输单元的共享存储器子系统。第一处理器被配置为在第一存储器中构建数据结构，并向共享存储器子系统的数据传送单元发送直接存储器访问（DMA）传送请求，DMA传输请求包括数据结构的地址第一记忆数据传送单元被配置为基于DMA传输请求从第一存储器检索数据结构，以将数据结构存储在共享存储器中，并且向第二处理器发送指示数据结构的地址的共享存储器指针在共享内存中。

2. 发明授权

US08612650B1 Virtual extension of buffer to reduce buffer overflow during tracing 有权
标题翻译：缓冲区的虚拟扩展，以减少跟踪期间的缓冲区溢出
公开(公告)号：US08612650B1
公开(公告)日：2013-12-17
申请号：US13419214
申请日：2012-03-13
申请人： Martial Carrie , James C. Wilshire
发明人： Martial Carrie , James C. Wilshire
IPC分类号： G06F3/00
CPC分类号： G06F11/364 , G06F11/0727 , G06F11/0778 , G11B20/10527
摘要： A system is disclosed comprising a processor, a trace module, a second buffer, and a bridge. The trace module has a first buffer configured to receive trace data from the processor at a first clock frequency. The second buffer is configured to receive trace data from the first buffer at a second clock frequency. The bridge is configured to receive trace data from the second buffer and output the trace data received from the second buffer at a third clock frequency. The second clock frequency is greater than the first clock frequency and the third clock frequency.
摘要翻译：公开了一种包括处理器，跟踪模块，第二缓冲器和桥接器的系统。跟踪模块具有配置成以第一时钟频率从处理器接收跟踪数据的第一缓冲器。第二缓冲器被配置为以第二时钟频率从第一缓冲器接收跟踪数据。桥被配置为从第二缓冲器接收跟踪数据，并以第三时钟频率输出从第二缓冲器接收的跟踪数据。第二个时钟频率大于第一个时钟频率和第三个时钟频率。

3. 发明授权

US08161328B1 Debugger interface 有权
标题翻译：调试器界面
公开(公告)号：US08161328B1
公开(公告)日：2012-04-17
申请号：US12789394
申请日：2010-05-27
申请人： James C. Wilshire
发明人： James C. Wilshire
IPC分类号： G06F11/00
CPC分类号： G06F11/2236
摘要： A system is disclosed comprising a processor, and a debug circuit. The debug circuit comprises a reset circuit configured to detect when the system is released from a reset, a debugger detection circuit configured to detect whether an external debugger is connected to the system at a time the reset circuit detects a release from the reset, and a halt circuit configured to halt operation of the processor when the debugger detection circuit detects the debugger at the time of release from the reset.
摘要翻译：公开了一种包括处理器和调试电路的系统。调试电路包括：复位电路，被配置为检测系统何时从复位中释放;调试器检测电路，被配置为在复位电路检测到复位释放时检测外部调试器是否连接到系统;以及停止电路被配置为当调试器检测电路在从复位释放时检测到调试器时停止处理器的操作。

4. 发明授权

US07171110B1 System and a method for storing audio/video programs on a hard disk drive for presentation to a viewer 有权
标题翻译：系统和用于将音频/视频节目存储在硬盘驱动器上以呈现给观看者的方法
公开(公告)号：US07171110B1
公开(公告)日：2007-01-30
申请号：US10002388
申请日：2001-11-30
申请人： James C. Wilshire
发明人： James C. Wilshire
IPC分类号： H04N5/00
CPC分类号： H04N21/44004 , G11B20/10527 , G11B27/034 , G11B2020/10592 , G11B2020/10685 , G11B2020/10694 , H04N5/4401 , H04N5/76 , H04N5/781 , H04N9/8042 , H04N9/8227 , H04N21/4147 , H04N21/42661 , H04N21/4334 , H04N21/434 , H04N21/43632
摘要： An audio/video (A/V) system for storing A/V programs includes an interface configured to receive a transport stream structured in packets and representing a plurality of A/V programs. Each A/V program is represented by a plurality of packets and is identified by program identification data in each packet. A storage management system is connected to receive the transport stream from the interface and to detect the program identification data of each received packet. A buffer is coupled to the storage management system and has a plurality of separate buffer portions. Each buffer portion is in communication with the storage management system to receive data of packets having program identification data related to a single A/V program and to store the data of the packets separate from data of packets having program identification data related to different A/V programs. A storage medium is coupled to the storage management system and has a plurality of separate storage files for the A/V programs. Each storage file receives data of the packets having program identification data related to a single A/V program and transferred from one of the separate buffer portions of the buffer.
摘要翻译：用于存储A / V程序的音频/视频（A / V）系统包括被配置为接收以分组结构并表示多个A / V节目的传输流的接口。每个A / V程序由多个分组表示，并且由每个分组中的节目识别数据来标识。连接存储管理系统以从接口接收传输流并检测每个接收的分组的节目标识数据。缓冲器耦合到存储管理系统并且具有多个单独的缓冲器部分。每个缓冲器部分与存储管理系统通信以接收具有与单个A / V程序相关的程序识别数据的数据包的数据，并且存储与具有与不同A / V程序相关的程序识别数据的数据包的数据分离的数据， V程序。存储介质耦合到存储管理系统，并且具有用于A / V程序的多个单独的存储文件。每个存储文件接收具有与单个A / V程序相关的程序标识数据并且从缓冲器的单独缓冲器部分之一传送的数据包的数据。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式