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1. 发明授权

US09111499B2 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US09111499B2
公开(公告)日：2015-08-18
申请号：US14047199
申请日：2013-10-07
申请人： Japan Display Inc.
发明人： Tomohide Oohira
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2320/0223 , G09G2320/0252
摘要： In a liquid crystal display device that performs two-line inversion driving, a difference of a write period of a substantial video signal between a pair of pixel rows scanned with the same polarity is compensated. An input signal pre-processing circuit 42 receives display data DATA and an original data enable signal DTMG, generates and inputs a data enable signal DTMG_R and display data DATA_R to a driver control signal generation block 40. DTMG_R is reduced in the active period, and an interval of the active period between a (2n−1)-th row and a 2n-th row is set to be larger than an interval of the active period between the 2n-th row and a (2n+1)-th row. The input signal pre-processing circuit 42 reads out DATA of each row from a buffer as DATA_R in an active period of DTMG_R.
摘要翻译：在执行双线反转驱动的液晶显示装置中，补偿以相同极性扫描的一对像素行之间的基本视频信号的写入周期的差。输入信号预处理电路42接收显示数据DATA和原始数据使能信号DTMG，产生并输入数据使能信号DTMG_R并将数据DATA_R显示给驱动器控制信号生成块40.在活动期间减少DTMG_R，并且将第（2n-1）行和第2n行之间的活动期间的间隔设定为大于第2n行和第（2n + 1）行的有效期间的间隔。输入信号预处理电路42在DTMG_R的活动时段中从缓冲器中读出每行的DATA作为DATA_R。

2. 发明授权

US09111508B2 Display device 有权
标题翻译：显示设备
公开(公告)号：US09111508B2
公开(公告)日：2015-08-18
申请号：US13758388
申请日：2013-02-04
申请人： Japan Display Inc.
发明人： Tomohide Oohira , Masahiro Tokita , Yasuhiko Yamagishi
IPC分类号： G09G3/28 , G09G3/36
CPC分类号： G09G3/3685 , G09G2310/08 , G09G2320/0233
摘要： Each of a plurality of timing controllers has a synchronization reference signal output terminal from which a synchronization reference signal is output and a synchronization reference signal input terminal to which the synchronization reference signal is input. A master timing controller outputs a predetermined signal of display signals which are input from an external device, from the synchronization reference signal output terminal of the master timing controller as the synchronization reference signal, and the synchronization reference signal is input to the synchronization reference signal input terminals of the master timing controller and a slave timing controller. Accordingly, a luminance difference can be prevented from occurring between divided regions of a display panel due to asynchronization between display signals input to respective timing controllers in a display device in which a plurality of timing controllers are used and the display panel is divided into a plurality of regions.
摘要翻译：多个定时控制器中的每一个具有从其输出同步参考信号的同步参考信号输出端子和输入同步参考信号的同步参考信号输入端子。主时序控制器从主时序控制器的同步参考信号输出端输出从外部设备输入的显示信号的预定信号作为同步参考信号，同步参考信号被输入到同步参考信号输入主时序控制器的端子和从时钟控制器。因此，由于在使用多个定时控制器的显示装置中由于输入到各个定时控制器的显示信号之间的异步而使显示面板的分割区域之间发生亮度差异，并且显示面板被分成多个的地区。

3. 发明授权

US09489904B2 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US09489904B2
公开(公告)日：2016-11-08
申请号：US14203843
申请日：2014-03-11
申请人： Japan Display Inc.
发明人： Toshiki Misonou , Tomohide Oohira
IPC分类号： G09G5/10 , G09G3/36 , G09G5/34
CPC分类号： G09G3/3614 , G09G3/3648 , G09G5/34 , G09G2310/0213 , G09G2310/0224 , G09G2320/046
摘要： A liquid crystal display device includes image signal lines, a plurality of pixel circuits that is connected to the image signal lines, an image signal line driving circuit that is connected to the image signal lines, and sequentially outputs an image signal, a gate line driving circuit that supplies a scanning signal. A period in which the gate line driving circuit supplies a scanning signal to any pixel circuit is a first period in which the image signal is output to the pixel circuit when a polarity of the image signal in a previous frame is different from the polarity in the present frame, and the first period and a second period in which the image signal of a different polarity is supplied before the first period when the polarity in the previous frame is identical with the polarity in the present frame.
摘要翻译：液晶显示装置包括图像信号线，连接到图像信号线的多个像素电路，连接到图像信号线的图像信号线驱动电路，并且顺序地输出图像信号，栅极线驱动电路提供扫描信号。栅极线驱动电路向任何像素电路提供扫描信号的时段是当前一帧中的图像信号的极性不同于像素电路中的极性时将图像信号输出到像素电路的第一时段以及当前一帧中的极性与当前帧中的极性相同时，在第一周期之前提供不同极性的图像信号的第一周期和第二周期。

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