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    • 5. 发明申请
    • Multithreaded kernel for graphics processing unit
    • 用于图形处理单元的多线程内核
    • US20100122259A1
    • 2010-05-13
    • US12657278
    • 2010-01-15
    • Anuj B. GosaliaSteve Pronovost
    • Anuj B. GosaliaSteve Pronovost
    • G06F9/46G06F15/167
    • G06F9/5038G06F9/30087G06F9/461G06F9/4843G06F9/5016G06F9/544G06F9/546Y02D10/22Y02D10/24
    • Systems and methods are provided for scheduling the processing of a coprocessor whereby applications can submit tasks to a scheduler, and the scheduler can determine how much processing each application is entitled to as well as an order for processing. In connection with this process, tasks that require processing can be stored in physical memory or in virtual memory that is managed by a memory manager. The invention also provides various techniques of determining whether a particular task is ready for processing. A “run list” may be employed to ensure that the coprocessor does not waste time between tasks or after an interruption. The invention also provides techniques for ensuring the security of a computer system, by not allowing applications to modify portions of memory that are integral to maintaining the proper functioning of system operations.
    • 提供了用于调度协处理器的处理的系统和方法,由此应用可以将任务提交给调度器,并且调度器可以确定每个应用程序被处理多少处理以及处理顺序。 关于这个过程,需要处理的任务可以被存储在由存储器管理器管理的物理存储器或虚拟存储器中。 本发明还提供了确定特定任务是否准备好进行处理的各种技术。 可以使用“运行列表”来确保协处理器不会在任务之间或在中断之后浪费时间。 本发明还提供了用于确保计算机系统的安全性的技术,不允许应用修改为维持系统操作的正常功能而整体的部分存储器。
    • 6. 发明授权
    • Systems and methods for scheduling coprocessor resources in a computing system
    • 在计算系统中调度协处理器资源的系统和方法
    • US07444637B2
    • 2008-10-28
    • US10777797
    • 2004-02-12
    • Steve PronovostAnuj B. GosaliaBryan L. LangleyHideyuki Nagase
    • Steve PronovostAnuj B. GosaliaBryan L. LangleyHideyuki Nagase
    • G06F9/46G06F13/28G06F9/34G06F15/76
    • G06F13/30G06F9/4881G06F9/5016
    • Systems and methods for scheduling coprocessing resources in a computing system are provided without redesigning the coprocessor. In various embodiments, a system of preemptive multitasking is provided achieving benefits over cooperative multitasking by any one or more of (1) executing rendering commands sent to the coprocessor in a different order than they were submitted by applications; (2) preempting the coprocessor during scheduling of non-interruptible hardware; (3) allowing user mode drivers to build work items using command buffers in a way that does not compromise security; (4) preparing DMA buffers for execution while the coprocessor is busy executing a previously prepared DMA buffer; (5) resuming interrupted DMA buffers; and (6) reducing the amount of memory needed to run translated DMA buffers.
    • 提供了一种用于在计算系统中调度协处理资源的系统和方法,而不重新设计协处理器。 在各种实施例中,提供了一种抢占式多任务的系统,其通过以下方式中的任何一个或多个实现协作多任务的优点:(1)以与应用提交的顺序不同的顺序执行发送到协处理器的呈现命令; (2)在调度不可中断硬件期间抢占协处理器; (3)允许用户模式驱动程序以不损害安全性的方式使用命令缓冲区构建工作项; (4)在协处理器忙于执行预先准备的DMA缓冲器时,准备执行DMA缓冲器; (5)恢复中断DMA缓冲区; 和(6)减少运行转换的DMA缓冲区所需的内存量。
    • 7. 发明申请
    • SYSTEMS AND METHODS FOR ENHANCING PERFORMANCE OF A COPROCESSOR
    • 用于提高共处理器性能的系统和方法
    • US20080301687A1
    • 2008-12-04
    • US12172910
    • 2008-07-14
    • Anuj B. GosaliaSteve Pronovost
    • Anuj B. GosaliaSteve Pronovost
    • G06F9/46
    • G06F9/5038G06F9/30087G06F9/461G06F9/4843G06F9/5016G06F9/544G06F9/546Y02D10/22Y02D10/24
    • Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.
    • 用于最小化协处理器“饥饿”的技术,并且用于在协处理器中有效地调度处理以获得更高的效率和功率。 提供运行列表,允许协处理器从一个任务切换到下一个任务,而不必等待CPU干预。 称为“表面故障”的方法允许协处理器在大任务开始时发生故障,而不是在任务中间的任何地方。 可以将DMA控制指令,即“围栏”,“陷阱”和“启用/禁用上下文切换”插入到处理流中,以使协处理器执行增强协处理器效率和功率的任务。 这些指令也可用于构建高级同步对象。 最后,描述了一种“翻转”技术,其可以将显示器的基准基准从一个位置切换到另一个位置,从而改变整个显示表面。
    • 8. 发明授权
    • Systems and methods for enhancing performance of a coprocessor
    • 用于增强协处理器性能的系统和方法
    • US07421694B2
    • 2008-09-02
    • US10763778
    • 2004-01-22
    • Anuj B. GosaliaSteve Pronovost
    • Anuj B. GosaliaSteve Pronovost
    • G06F9/46G06F12/00
    • G06F9/4843G06F9/4881G06F9/5016Y02D10/22Y02D10/24
    • Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.
    • 用于最小化协处理器“饥饿”的技术,并且用于在协处理器中有效地调度处理以获得更高的效率和功率。 提供运行列表,允许协处理器从一个任务切换到下一个任务,而不必等待CPU干预。 称为“表面故障”的方法允许协处理器在大任务开始时发生故障,而不是在任务中间的任何地方。 可以将DMA控制指令,即“围栏”,“陷阱”和“启用/禁用上下文切换”插入到处理流中,以使协处理器执行增强协处理器效率和功率的任务。 这些指令也可用于构建高级同步对象。 最后,描述了一种“翻转”技术,其可以将显示器的基准基准从一个位置切换到另一个位置,从而改变整个显示表面。