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    • 1. 发明授权
    • Pausing column readout in image sensors
    • 在图像传感器中暂停列读数
    • US08659694B2
    • 2014-02-25
    • US12953535
    • 2010-11-24
    • John T. ComptonJeffrey S. GerstenbergerRavi Mruthyunjaya
    • John T. ComptonJeffrey S. GerstenbergerRavi Mruthyunjaya
    • H04N5/335H04N3/14
    • H04N5/3658H04N5/341H04N5/3577H04N5/3742H04N5/3765
    • An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.
    • 图像传感器包括具有多个列输出的像素的二维阵列和连接到每个列输出的输出电路。 每个输出电路配置为同时进行采样和读取操作。 模拟前端(AFE)电路处理从输出电路输出的像素数据,AFE时钟控制器将AFE时钟信号发送到AFE电路以实现像素数据的处理。 定时发生器输出由列解码器接收的列地址序列。 在一个或多个采样操作期间,定时发生器暂停列地址序列,随后在一个或多个采样操作期间,AFE时钟控制器暂停AFE计时信号。 AFE计时信号和列地址序列在一个或多个采样操作结束时恢复。
    • 4. 发明申请
    • PAUSING COLUMN READOUT IN IMAGE SENSORS
    • 在图像传感器中暂停列读取
    • US20110157438A1
    • 2011-06-30
    • US12953535
    • 2010-11-24
    • John T. ComptonJeffrey S. GerstenbergerRavi Mruthyunjaya
    • John T. ComptonJeffrey S. GerstenbergerRavi Mruthyunjaya
    • H04N5/335
    • H04N5/3658H04N5/341H04N5/3577H04N5/3742H04N5/3765
    • An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the timing generator suspends the column address sequence and subsequently during the one or more sample operations the AFE clock controller suspends the AFE clocking signal. The AFE clocking signal and the column address sequence resume at the end of the one or more sample operations.
    • 图像传感器包括具有多个列输出的像素的二维阵列和连接到每个列输出的输出电路。 每个输出电路配置为同时进行采样和读取操作。 模拟前端(AFE)电路处理从输出电路输出的像素数据,AFE时钟控制器将AFE时钟信号发送到AFE电路以实现像素数据的处理。 定时发生器输出由列解码器接收的列地址序列。 在一个或多个采样操作期间,定时发生器暂停列地址序列,随后在一个或多个采样操作期间,AFE时钟控制器暂停AFE计时信号。 AFE计时信号和列地址序列在一个或多个采样操作结束时恢复。
    • 6. 发明授权
    • Suspending column readout in image sensors
    • 在图像传感器中暂停列读数
    • US08525910B2
    • 2013-09-03
    • US12952466
    • 2010-11-23
    • Jeffrey S. GerstenbergerRavi MruthyunjayaJohn T. Compton
    • Jeffrey S. GerstenbergerRavi MruthyunjayaJohn T. Compton
    • H04N5/335H04N3/14
    • H04N5/3742H04N5/3577
    • An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the AFE clock controller suspends the output of the AFE clocking signal and the timing generator suspends the output of the column address sequence during the sample operation. The output of the AFE clocking signal and the column address sequence resume at the end of the sample operation.
    • 图像传感器包括具有多个列输出的像素的二维阵列和连接到每个列输出的输出电路。 每个输出电路配置为同时进行采样和读取操作。 模拟前端(AFE)电路处理从输出电路输出的像素数据,AFE时钟控制器将AFE时钟信号发送到AFE电路以实现像素数据的处理。 定时发生器输出由列解码器接收的列地址序列。 在一个或多个采样操作期间,AFE时钟控制器暂停AFE时钟信号的输出,定时发生器在采样操作期间暂停列地址序列的输出。 在样品操作结束时,AFE时钟信号和列地址序列的输出恢复。
    • 8. 发明申请
    • SUSPENDING COLUMN READOUT IN IMAGE SENSORS
    • 图像传感器中的悬挂柱读数
    • US20110157444A1
    • 2011-06-30
    • US12952466
    • 2010-11-23
    • Jeffrey S. GerstenbergerRavi MruthyunjayaJohn T. Compton
    • Jeffrey S. GerstenbergerRavi MruthyunjayaJohn T. Compton
    • H04N5/335
    • H04N5/3742H04N5/3577
    • An image sensor includes a two-dimensional array of pixels having multiple column outputs and an output circuit connected to each column output. Each output circuit is configured to operate concurrent sample and read operations. An analog front end (AFE) circuit processes pixel data output from the output circuits and an AFE clock controller transmits an AFE clocking signal to the AFE circuit to effect processing of the pixel data. A timing generator outputs a column address sequence that is received by a column decoder. During one or more sample operations the AFE clock controller suspends the output of the AFE clocking signal and the timing generator suspends the output of the column address sequence during the sample operation. The output of the AFE clocking signal and the column address sequence resume at the end of the sample operation.
    • 图像传感器包括具有多个列输出的像素的二维阵列和连接到每个列输出的输出电路。 每个输出电路配置为同时进行采样和读取操作。 模拟前端(AFE)电路处理从输出电路输出的像素数据,AFE时钟控制器将AFE时钟信号发送到AFE电路以实现像素数据的处理。 定时发生器输出由列解码器接收的列地址序列。 在一个或多个采样操作期间,AFE时钟控制器暂停AFE时钟信号的输出,定时发生器在采样操作期间暂停列地址序列的输出。 在样品操作结束时,AFE时钟信号和列地址序列的输出恢复。