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1. 发明授权

US07180358B2 CMOS exponential function generating circuit with temperature compensation technique 失效
标题翻译：具有温度补偿技术的CMOS指数函数发生电路
公开(公告)号：US07180358B2
公开(公告)日：2007-02-20
申请号：US11004432
申请日：2004-12-03
申请人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
发明人： Jong Kee Kwon , Mun Yang Park , Jong Dae Kim , Won Chul Song
IPC分类号： G06G7/20
CPC分类号： H03F3/45928 , H03F3/45179 , H03F3/45475 , H03F2203/45212 , H03F2203/45482 , H03F2203/45484 , H03F2203/45508 , H03G7/001
摘要： Provided is a CMOS exponential function generating circuit capable of compensating for the exponential function characteristic according to temperature variations. The exponential function generating circuit includes an voltage scaler scaling the value of an external gain control voltage signal, an exponential function generating unit generating exponential function current and voltage in response to a signal output from the voltage scaler, a reference voltage generator providing a reference voltage to the exponential function generating unit, and a temperature compensator compensating for the exponential function characteristic according to temperature variations.
摘要翻译：提供了能够根据温度变化补偿指数函数特性的CMOS指数函数发生电路。指数函数发生电路包括缩放外部增益控制电压信号的值的电压缩放器，响应于从电压调节器输出的信号产生指数函数电流和电压的指数函数产生单元，提供参考电压的参考电压发生器到指数函数产生单元，以及根据温度变化补偿指数函数特性的温度补偿器。

2. 发明授权

US07193468B2 Active load circuit for low-voltage CMOS voltage gain amplifier with wide bandwidth and high gain characteristic 失效
标题翻译：用于具有宽带宽和高增益特性的低压CMOS电压增益放大器的有源负载电路
公开(公告)号：US07193468B2
公开(公告)日：2007-03-20
申请号：US10846082
申请日：2004-05-14
申请人： Jong Kee Kwon , Gyu Hyeong Cho , Mun Yang Park , Jong Dae Kim
发明人： Jong Kee Kwon , Gyu Hyeong Cho , Mun Yang Park , Jong Dae Kim
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F3/45179 , H03F2203/45644
摘要： Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.
摘要翻译：提供了一种电压增益放大器的有源负载电路，其允许在高频范围内具有低电源电压操作的高电压增益。有源负载电路包括连接在放大单元和电源电压之间并用作低频范围内的负载元件的PMOS晶体管; 负反馈缓冲单元，其连接到PMOS晶体管的栅极并用作公共漏极放大器，以稳定电压增益放大器的输出电压并以低电压驱动电压增益放大器; 以及电容器，其连接到负反馈缓冲单元，并且当电压增益放大器在高频范围内工作时，补偿阻抗和频率特性两者。

3. 发明授权

US09391462B2 Energy storage system with wired and wireless energy transfer function 有权
标题翻译：储能系统具有有线和无线能量传递功能
公开(公告)号：US09391462B2
公开(公告)日：2016-07-12
申请号：US13596618
申请日：2012-08-28
申请人： Yil Suk Yang , Jong Dae Kim , Se Wan Heo , Ji Min Oh , Min Ki Kim , Jong Kee Kwon
发明人： Yil Suk Yang , Jong Dae Kim , Se Wan Heo , Ji Min Oh , Min Ki Kim , Jong Kee Kwon
IPC分类号： H01F27/42 , H02J5/00 , H02J7/00
CPC分类号： H02J50/00 , H02J5/005 , H02J7/0063 , H02J7/025
摘要： Disclosed is an energy storage system provided with a wired and wireless energy transfer function. The energy storage system includes: an energy input unit to which energy generated from a plurality of energy sources is input; an energy input control unit for selecting one energy source from among the plurality of energy sources, and transferring energy of the selected energy source through operation in a wired operation mode or a wireless operation mode; a wireless energy transmitting/receiving unit for wirelessly transmitting/receiving the energy of the selected energy source during the operation in the wireless operation mode of the energy input control unit; an energy storage/control unit for storing the energy of the selected energy source; an energy output unit for consuming the energy stored in the energy storage/control unit; and an energy output control unit for distributing the energy stored in the energy storage/control unit to the energy output unit.
摘要翻译：公开了一种具有有线和无线能量传递功能的能量存储系统。能量存储系统包括：输入从多个能量源产生的能量的能量输入单元; 能量输入控制单元，用于从所述多个能量源中选择一个能量源，并且通过在有线操作模式或无线操作模式中的操作来传送所选择的能量源的能量; 无线能量发送/接收单元，用于在能量输入控制单元的无线操作模式下的操作期间，无线地发送/接收所选择的能量源的能量; 用于存储所选能量源的能量的能量存储/控制单元; 用于消耗存储在能量存储/控制单元中的能量的能量输出单元; 以及能量输出控制单元，用于将存储在能量存储/控制单元中的能量分配给能量输出单元。

4. 发明申请

US20130193774A1 ENERGY STORAGE SYSTEM WITH WIRED AND WIRELESS ENERGY TRANSFER FUNCTION 有权
标题翻译：具有有线和无线能量传递功能的能源存储系统
公开(公告)号：US20130193774A1
公开(公告)日：2013-08-01
申请号：US13596618
申请日：2012-08-28
申请人： Yil Suk Yang , Jong Dae Kim , Se Wan Heo , Ji Min Oh , Min Ki Kim , Jong Kee Kwon
发明人： Yil Suk Yang , Jong Dae Kim , Se Wan Heo , Ji Min Oh , Min Ki Kim , Jong Kee Kwon
IPC分类号： H02J7/00
CPC分类号： H02J50/00 , H02J5/005 , H02J7/0063 , H02J7/025
摘要： Disclosed is an energy storage system provided with a wired and wireless energy transfer function. The energy storage system includes: an energy input unit to which energy generated from a plurality of energy sources is input; an energy input control unit for selecting one energy source from among the plurality of energy sources, and transferring energy of the selected energy source through operation in a wired operation mode or a wireless operation mode; a wireless energy transmitting/receiving unit for wirelessly transmitting/receiving the energy of the selected energy source during the operation in the wireless operation mode of the energy input control unit; an energy storage/control unit for storing the energy of the selected energy source; an energy output unit for consuming the energy stored in the energy storage/control unit; and an energy output control unit for distributing the energy stored in the energy storage/control unit to the energy output unit.
摘要翻译：公开了一种具有有线和无线能量传递功能的能量存储系统。能量存储系统包括：输入从多个能量源产生的能量的能量输入单元; 能量输入控制单元，用于从所述多个能量源中选择一个能量源，并且通过在有线操作模式或无线操作模式中的操作来传送所选择的能量源的能量; 无线能量发送/接收单元，用于在能量输入控制单元的无线操作模式下的操作期间，无线地发送/接收所选择的能量源的能量; 用于存储所选能量源的能量的能量存储/控制单元; 用于消耗存储在能量存储/控制单元中的能量的能量输出单元; 以及能量输出控制单元，用于将存储在能量存储/控制单元中的能量分配到能量输出单元。

5. 发明授权

US08205021B2 Memory system and integrated management method for plurality of DMA channels 有权
标题翻译：用于多个DMA通道的存储系统和集成管理方法
公开(公告)号：US08205021B2
公开(公告)日：2012-06-19
申请号：US12882141
申请日：2010-09-14
申请人： Ik Jae Chun , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae Chun , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

6. 发明申请

US20110145549A1 PIPELINED DECODING APPARATUS AND METHOD BASED ON PARALLEL PROCESSING 审中-公开
标题翻译：基于并行处理的管道解码设备和方法
公开(公告)号：US20110145549A1
公开(公告)日：2011-06-16
申请号：US12862565
申请日：2010-08-24
申请人： Jung Hee SUK , Chun Gi Lyuh , Ik Jae Chun , Se Wan Heo , Soon II Yeo , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Jung Hee SUK , Chun Gi Lyuh , Ik Jae Chun , Se Wan Heo , Soon II Yeo , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： H04N19/436 , H04N19/44
摘要： An apparatus and method for decoding moving images based on parallel processing are provided. The apparatus for decoding images based on parallel processing can improve operational performance by pipelining massive-data transmission between processors while performing context-adaptive variable length decoding (CAVLD), inverse quantization (IQ), inverse transformation (IT), motion compensation (MC), intra prediction (IP) and deblocking filter (DF) operations in parallel in units of pluralities of macroblocks (MBs).
摘要翻译：提供了一种基于并行处理来解码运动图像的装置和方法。用于基于并行处理的图像解码装置可以通过在执行上下文自适应可变长度解码（CAVLD），逆量化（IQ），逆变换（IT），运动补偿（MC））之间流水线处理大规模数据传输来提高操作性能，，帧内预测（IP）和去块滤波器（DF）操作以多个宏块（MB）为单位并行。

7. 发明申请

US20110153878A1 MEMORY SYSTEM AND INTEGRATED MANAGEMENT METHOD FOR PLURALITY OF DMA CHANNELS 有权
标题翻译：用于DMA通道多重的存储系统和集成管理方法
公开(公告)号：US20110153878A1
公开(公告)日：2011-06-23
申请号：US12882141
申请日：2010-09-14
申请人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

8. 发明授权

US08407276B2 Apparatus for calculating absolute difference 有权
标题翻译：用于计算绝对差的装置
公开(公告)号：US08407276B2
公开(公告)日：2013-03-26
申请号：US12843550
申请日：2010-07-26
申请人： Chun Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Chun Gi Lyuh , Ik Jae Chun , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F7/50
CPC分类号： G06F7/544
摘要： Provided is an apparatus for calculating an absolute difference capable of efficiently performing an absolute difference using an adder. The apparatus for calculating an absolute difference includes a comparator comparing values of two integers, first and second selectors each selecting and outputting one of the two integers according to the comparison results of the comparator, an inverter complementing the result value selected by the second selector; and an adder adding up the result value selected by the first selector, the value complemented by the inverter, and 1.
摘要翻译：提供了一种用于计算能够使用加法器有效地执行绝对差的绝对差的装置。用于计算绝对差的装置包括比较器，比较器比较两个整数的值，第一和第二选择器，每个选择器根据比较器的比较结果选择和输出两个整数中的一个;逆变器，补偿由第二选择器选择的结果值; 和加法器将由第一选择器选择的结果值相加，由逆变器补充的值，以及1。

9. 发明申请

US20120226831A1 MEMORY SYSTEM AND INTEGRATED MANAGEMENT METHOD FOR PLURALITY OF DMA CHANNELS 审中-公开
标题翻译：用于DMA通道多重的存储系统和集成管理方法
公开(公告)号：US20120226831A1
公开(公告)日：2012-09-06
申请号：US13471236
申请日：2012-05-14
申请人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Ik Jae CHUN , Chun Gi Lyuh , Se Wan Heo , Sang Hun Yoon , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： Provided are a memory system and an integrated management method for a plurality of direct memory access (DMA) channels. The memory system includes a memory controller exchanging data with a memory and having a plurality of channels physically separated from each other, and a DMA controller having a plurality of DMA channels physically separated from each other and in contact with the plurality of channels of the memory controller, and exchanging data with the memory via the plurality of DMA channels and the memory controller.
摘要翻译：提供了用于多个直接存储器访问（DMA）通道的存储器系统和集成管理方法。存储器系统包括存储器控制器，其与存储器交换数据并且具有物理上彼此分离的多个通道;以及DMA控制器，其具有彼此物理上彼此分离并与存储器的多个通道接触的多个DMA通道控制器，并且经由多个DMA通道和存储器控制器与存储器交换数据。

10. 发明申请

US20110142345A1 APPARATUS AND METHOD FOR RECOGNIZING IMAGE 审中-公开
标题翻译：用于识别图像的装置和方法
公开(公告)号：US20110142345A1
公开(公告)日：2011-06-16
申请号：US12783180
申请日：2010-05-19
申请人： Sang Hun Yoon , Ik Jae Chun , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
发明人： Sang Hun Yoon , Ik Jae Chun , Chun Gi Lyuh , Jung Hee Suk , Tae Moon Roh , Jong Kee Kwon , Jong Dae Kim
IPC分类号： G06K9/46
CPC分类号： G06K9/4614
摘要： Provided are an apparatus and method for recognizing an image. In the apparatus and method for recognizing an image, various features can be extracted by a Haar-like filter using 1st to nth order gradients of the x- and y-axis of an input image, and the input image is correctly classified as a true or false image using, in stages, the extracted features of the input image, multiple threshold values for a true image and multiple threshold values for a false image. Accordingly, the apparatus and method achieve a high recognition rate by performing a small amount of computation. Consequently, it is possible to rapidly and correctly recognize an image, enabling real-time image recognition.
摘要翻译：提供了一种用于识别图像的装置和方法。在用于识别图像的装置和方法中，可以通过输入图像的x轴和y轴的第1至n阶梯度的Haar样滤波器提取各种特征，并且输入图像被正确地分类为真或分别使用输入图像的提取特征，用于真实图像的多个阈值和用于假图像的多个阈值的假图像。因此，该装置和方法通过执行少量的计算来实现高识别率。因此，可以快速且正确地识别图像，从而实现图像识别。

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