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    • 7. 发明授权
    • Method for fabricating recess gate in semiconductor device
    • 在半导体器件中制造凹槽的方法
    • US07838361B2
    • 2010-11-23
    • US12239492
    • 2008-09-26
    • Yong-Tae ChoEun-Mi Kim
    • Yong-Tae ChoEun-Mi Kim
    • H01L21/336
    • H01L21/28114H01L29/4236H01L29/42372H01L29/66621
    • A method for fabricating a recess gate in a semiconductor device includes etching a silicon substrate to form a trench that defines an active region, forming a device isolation layer that gap-fills the trench, forming a hard mask layer over the silicon substrate, the hard mask layer comprising a stack of an oxide layer and an amorphous carbon layer, wherein the hard mask layer exposes a channel target region of the active region, and forming a recess region with a dual profile by first etching and second etching the channel target region using the hard mask layer as an etch barrier, wherein the second etching is performed after removing the amorphous carbon layer.
    • 一种在半导体器件中制造凹陷栅的方法,包括蚀刻硅衬底以形成限定有源区的沟槽,形成间隙填充沟槽的器件隔离层,在硅衬底上形成硬掩模层,硬的 掩模层,其包括氧化物层和非晶碳层的堆叠,其中所述硬掩模层暴露所述有源区的沟道目标区域,并且通过第一蚀刻形成具有双轮廓的凹陷区域,并且使用 所述硬掩模层作为蚀刻阻挡层,其中所述第二蚀刻在去除所述无定形碳层之后进行。