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    • 1. 发明授权
    • Preamble detection with multiple receive antennas
    • 使用多个接收天线进行前导码检测
    • US08014456B1
    • 2011-09-06
    • US11820397
    • 2007-06-19
    • Jongwon LeeHui-Ling Lou
    • Jongwon LeeHui-Ling Lou
    • H04K1/10
    • H04L27/2655H04L27/2657H04L27/2675
    • A system includes a differential demodulation module that differentially demodulates modulated signals received from R antennas. A first summing module sums the differentially demodulated signals to generate a combined signal. A state detection module detects states of X symbols in the combined signal. A second summing module (i) receives Y preamble sequences each comprising X predetermined symbols and (ii) generates X sums for each of the Y preamble sequences by adding each of the states of the X symbols with corresponding states of the X predetermined symbols of each of Y preamble sequences. The states of the X predetermined symbols are generated by inverting states of derived symbols in derived preamble sequences, which are derived from the Y preamble sequences. Each of the Y preamble sequences is different from others of the Y preamble sequences. R, X, and Y are integers greater than 1.
    • 一种系统包括差分解调从R个天线接收的调制信号的差分解调模块。 第一求和模块将差分解调信号相加以产生组合信号。 状态检测模块检测组合信号中的X个符号的状态。 第二求和模块(i)接收每个包括X个预定符号的Y个前同步码序列,并且(ii)通过将X个符号的每个状态与每个X个符号的X个预定符号的相应状态相加,生成每个Y个前同步码序列的X个和 的前导码序列。 X个预定符号的状态是通过从导出的前同步码序列中导出的导出符号的状态反转而产生的,这些前导码序列是从Y个前同步码序列导出的。 Y前同步码序列中的每一个与Y前同步码序列中的其他序列不同。 R,X和Y是大于1的整数。
    • 2. 发明授权
    • Preamble detection with multiple receive antennas
    • 使用多个接收天线进行前导码检测
    • US07991077B1
    • 2011-08-02
    • US11753953
    • 2007-05-25
    • Jongwon LeeHui-Ling Lou
    • Jongwon LeeHui-Ling Lou
    • H03K9/00
    • H04L27/2655H04L27/2657H04L27/2675
    • A system including a differential demodulation module that receives modulated signals from R antennas and that differentially demodulates the modulated signals to generate differentially demodulated signals, where R is an integer greater than or equal to 1. A summing module sums the differentially demodulated signals to generate a combined signal. A correlation module correlates the combined signal with derived preamble sequences and generates correlation values based on the correlation. The derived preamble sequences are derived from preamble sequences. Each bit of one of the derived preamble sequences has a first state when a corresponding bit and a bit adjacent to the corresponding bit in a corresponding one of the preamble sequences have opposite states. Each bit has a second state when the corresponding bit and the bit adjacent to the corresponding bit have the same state.
    • 一种包括差分解调模块的系统,该差分解调模块从R天线接收调制信号,并对调制信号进行差分解调以产生差分解调信号,其中R是大于或等于1的整数。求和模块对差分解调信号求和,以产生 组合信号。 相关模块将组合信号与导出的前同步码序列进行相关,并根据相关性产生相关值。 导出的前导码序列是从前导序列中导出的。 当相应的一个前同步码序列中的相应位相邻的相应位和位相反时,所导出的前同步码序列之一的每个位具有第一状态。 当对应的位和与相应位相邻的位具有相同的状态时,每个位具有第二状态。
    • 3. 发明授权
    • Preamble detection with multiple receive antennas
    • 使用多个接收天线进行前导码检测
    • US07876858B1
    • 2011-01-25
    • US11820313
    • 2007-06-19
    • Jongwon LeeHui-Ling Lou
    • Jongwon LeeHui-Ling Lou
    • H03K9/00
    • H04L27/2655H04L27/2657H04L27/2675
    • A system comprises a correlation module that receives modulated signals from R antennas, that correlates each of the modulated signals with Y preamble sequences, and that generates Y correlation values for each of the R antennas, where R and Y are integers greater than or equal to 1. A control module generates correlation sums by adding each of the Y correlation values for one of the R antennas to corresponding ones of the Y correlation values for others of the R antennas, that selects a largest correlation sum from the correlation sums, and that detects one of the preamble sequences in the modulated signals when a magnitude of the largest correlation sum is greater than or equal to a first predetermined threshold.
    • 一种系统包括一个相关模块,该相关模块从R个天线接收调制信号,将每个调制信号与Y个前同步码序列进行相关,并产生每个R天线的Y相关值,其中R和Y是大于或等于 控制模块通过将R个天线中的一个的Y个相关值中的每一个相加到R个天线中的另一个的相关值中的相关值,从相关和中选出最大的相关和来产生相关和,并且 当最大相关和的大小大于或等于第一预定阈值时,检测调制信号中的前导码序列之一。
    • 7. 发明授权
    • Belt driven electric starter system
    • 皮带电动起动系统
    • US08689757B2
    • 2014-04-08
    • US13298091
    • 2011-11-16
    • Jongwon LeeHyounghyoun Kim
    • Jongwon LeeHyounghyoun Kim
    • F02N11/00F16H7/14
    • F02N11/04F02N11/0814F02N15/006F02N15/02F02N15/08F16H7/14F16H2007/0802
    • A Belt Driven Electric Starter System (BES) may have an idle pulley is composed of pivot point idle pulley forming pivot points at both sides of driving belt, which is wound on starter generator pulley and crank pulley, and driven idle pulley forming the fixing point, and a side of tension controller is fixed to engine and the opposite side is fixed to starter generator combined with starter generator pulley, such that it is possible to more effectively use the empty space without interference with the other portions in the entire layout of the BES. Further, excessive tension of driving belt due to starter generator when the engine is started can be attenuated by retraction of tension controller that moves with starter generator, while the excessive tension of driving belt due to crank pulley when electricity is generated can also be attenuated by extension of tension controller that moves with starter generator.
    • 带式电动起动器系统(BES)可以具有空转滑轮,由枢轴点空转滑轮组成,驱动带两侧的枢轴点缠绕在起动发电机滑轮和曲柄皮带轮上,并且驱动空转滑轮形成固定点 并且张力控制器的一侧被固定到发动机,并且相对侧被固定到起动发电机组合起动发电机滑轮,使得可以更有效地使用空的空间而不干扰其中的其它部分的整个布局 BES。 此外,当发动机起动时由于起动发电机引起的传动带的过大张力可以通过由起动发电机移动的张力控制器的缩回而衰减,同时由于曲柄皮带轮产生电力时由于曲柄皮带轮的过大张力也可以被衰减 使用起动发电机移动的张力控制器的延伸。
    • 8. 发明申请
    • TUNABLE OPTICAL FILTER UTILIZING A LONG-RANGE SURFACE PLASMON POLARITON WAVEGUIDE TO ACHIEVE A WIDE TUNING RANGE
    • 使用长距离表面平面波极管实现一个宽调谐范围的光电滤波器
    • US20120243821A1
    • 2012-09-27
    • US13426329
    • 2012-03-21
    • Mikhail BelkinJongwon Lee
    • Mikhail BelkinJongwon Lee
    • G02B6/00G02B5/28B82Y20/00
    • B82Y20/00G02B6/12007G02B6/1226G02F1/011G02F2203/10
    • An optical filter and a method for fabricating an optical filter with a wide tuning range and a structure subject to miniaturization. The optical filter includes a bottom and a top dielectric layer with a stripe or film of metal between the dielectric layers which have dissimilar refractive index dispersion. The stripe of metal functions as a waveguide supporting a long-range surface plasmon polariton mode which will be achieved at wavelengths for which the refractive indices of the dielectric layers are the same thereby providing a bandpass filter. Furthermore, one of the dielectric layers is made of a material that allows its refractive index to be tuned, such as by changing its applied voltage or temperature. By tuning the refractive index of the dielectric layer, the wavelength at which the refractive indices of the dielectric layers match changes thereby effectively tuning the optical filter.
    • 一种光学滤波器和用于制造具有宽调谐范围的滤光器和经受小型化的结构的方法。 滤光器包括底部和顶部电介质层,其具有在具有不同折射率色散的电介质层之间的金属条或金属薄膜。 金属条作为支持长距离表面等离子体激元模式的波导,其将在介电层的折射率相同的波长处实现,从而提供带通滤波器。 此外,电介质层之一由允许其折射率调节的材料制成,例如通过改变其施加的电压或温度。 通过调节电介质层的折射率,介电层的折射率匹配的波长变化,从而有效地调谐滤光器。
    • 9. 发明授权
    • Methods of forming CMOS transistors with high conductivity gate electrodes
    • 用高电导率栅电极形成CMOS晶体管的方法
    • US08252675B2
    • 2012-08-28
    • US12942763
    • 2010-11-09
    • Jongwon LeeBoun YoonSang Yeob HanChae Lyoung Kim
    • Jongwon LeeBoun YoonSang Yeob HanChae Lyoung Kim
    • H01L21/336H01L21/44H01L21/88H01L21/4763
    • H01L21/823842H01L21/28088H01L29/4966H01L29/66545H01L29/66583H01L29/6659H01L29/7833
    • Provided is a method for manufacturing a MOS transistor. The method comprises providing a substrate having a first active region and a second active region; forming a dummy gate stack on the first active region and the second active region, the dummy gate stack comprising a gate dielectric layer and a dummy gate electrode; forming source/drain regions in the first active region and the second active region disposed at both sides of the dummy gate stack; forming a mold insulating layer on the source/drain region; removing the dummy gate electrode on the first active region to form a first trench on the mold insulating layer; forming a first metal pattern to form a second trench at a lower portion of the first trench, and removing the dummy gate electrode on the second active region to from a third trench on the mold insulating layer; and forming a second metal layer in the second trench and the third trench to form a first gate electrode on the first active region and a second gate electrode on the second active region.
    • 提供一种用于制造MOS晶体管的方法。 该方法包括提供具有第一有源区和第二有源区的衬底; 在所述第一有源区和所述第二有源区上形成虚设栅极叠层,所述伪栅叠层包括栅介电层和虚栅极; 在所述第一有源区中形成源极/漏极区域和设置在所述伪栅极堆叠的两侧的所述第二有源区域; 在源/漏区上形成模绝缘层; 去除所述第一有源区上的所述伪栅电极以在所述模绝缘层上形成第一沟槽; 形成第一金属图案以在所述第一沟槽的下部形成第二沟槽,以及将所述第二有源区上的所述伪栅电极从所述模绝缘层上的第三沟槽移除; 以及在所述第二沟槽和所述第三沟槽中形成第二金属层,以在所述第一有源区上形成第一栅电极,在所述第二有源区上形成第二栅电极。
    • 10. 发明申请
    • Methods of Forming CMOS Transistors with High Conductivity Gate Electrodes
    • 用高导电性栅极电极形成CMOS晶体管的方法
    • US20110136313A1
    • 2011-06-09
    • US12942763
    • 2010-11-09
    • Jongwon LeeBoun YoonSang Yeob HanChae Lyoung Kim
    • Jongwon LeeBoun YoonSang Yeob HanChae Lyoung Kim
    • H01L21/28H01L21/8234
    • H01L21/823842H01L21/28088H01L29/4966H01L29/66545H01L29/66583H01L29/6659H01L29/7833
    • Provided is a method for manufacturing a MOS transistor. The method comprises providing a substrate having a first active region and a second active region; forming a dummy gate stack on the first active region and the second active region, the dummy gate stack comprising a gate dielectric layer and a dummy gate electrode; forming source/drain regions in the first active region and the second active region disposed at both sides of the dummy gate stack; forming a mold insulating layer on the source/drain region; removing the dummy gate electrode on the first active region to form a first trench on the mold insulating layer; forming a first metal pattern to form a second trench at a lower portion of the first trench, and removing the dummy gate electrode on the second active region to from a third trench on the mold insulating layer; and forming a second metal layer in the second trench and the third trench to form a first gate electrode on the first active region and a second gate electrode on the second active region.
    • 提供一种用于制造MOS晶体管的方法。 该方法包括提供具有第一有源区和第二有源区的衬底; 在所述第一有源区和所述第二有源区上形成虚设栅极叠层,所述伪栅叠层包括栅介电层和虚栅极; 在所述第一有源区中形成源极/漏极区域和设置在所述伪栅极堆叠的两侧的所述第二有源区域; 在源/漏区上形成模绝缘层; 去除所述第一有源区上的所述伪栅电极以在所述模绝缘层上形成第一沟槽; 形成第一金属图案以在所述第一沟槽的下部形成第二沟槽,以及将所述第二有源区上的所述伪栅电极从所述模绝缘层上的第三沟槽移除; 以及在所述第二沟槽和所述第三沟槽中形成第二金属层,以在所述第一有源区上形成第一栅电极,在所述第二有源区上形成第二栅电极。