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1. 发明授权

US08625814B2 Earphone antenna of a portable terminal 有权
标题翻译：便携式终端的耳机天线
公开(公告)号：US08625814B2
公开(公告)日：2014-01-07
申请号：US13099668
申请日：2011-05-03
申请人： Jun Young Yang , Min Cho , Byoung Hee Lee
发明人： Jun Young Yang , Min Cho , Byoung Hee Lee
IPC分类号： H04R1/10
CPC分类号： H04R1/1033
摘要： An earphone antenna of a portable terminal having enhanced reception sensitivity even when a wearing state of the earphone of the mobile terminal is changed is provided. The earphone antenna includes a plurality of voice signal lines, an insulating sheath configured to cover an outer surface of the plurality of the voice signal lines, a receptacle configured to connect to a first end of each of the plurality of the voice signal lines, and a ground and antenna line including a first antenna line configured to wind around an outer surface of the insulating sheath at a first interval in a spiral form, the first antenna line having a first thickness, wherein the ground and antenna line includes a second antenna line configured to wind around an outer surface of the receptacle at a second interval in the spiral form, the second antenna line having a second thickness that is greater than the first thickness and the second interval being different from the first interval.
摘要翻译：提供了即使当移动终端的耳机的佩戴状态改变时，具有增强的接收灵敏度的便携式终端的耳机天线。所述耳机天线包括多个语音信号线，绝缘护套，被配置为覆盖所述多个语音信号线的外表面;插座，被配置为连接到所述多个语音信号线中的每一个的第一端;以及地线和天线线，包括构造成以螺旋形式以第一间隔围绕绝缘护套的外表面缠绕的第一天线线，所述第一天线线具有第一厚度，其中所述地线和天线线包括第二天线线被构造成以螺旋形式的第二间隔围绕所述容器的外表面缠绕，所述第二天线线具有大于所述第一厚度的第二厚度，并且所述第二间隔与所述第一间隔不同。

2. 发明授权

US07700411B2 Semiconductor device package and manufacturing method 有权
标题翻译：半导体器件封装及制造方法
公开(公告)号：US07700411B2
公开(公告)日：2010-04-20
申请号：US11852079
申请日：2007-09-07
申请人： Jun Young Yang , You Ock Joo , Dong Pil Jung
发明人： Jun Young Yang , You Ock Joo , Dong Pil Jung
IPC分类号： H01L21/44 , H01L21/48
CPC分类号： H01L23/552 , H01L21/561 , H01L23/29 , H01L23/3121 , H01L23/3135 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.
摘要翻译：半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。本发明还提供了制造半导体器件封装的方法。

3. 发明申请

US20060145339A1 Semiconductor package 有权
标题翻译：半导体封装
公开(公告)号：US20060145339A1
公开(公告)日：2006-07-06
申请号：US11028757
申请日：2005-01-05
申请人： Jun Young Yang , You Ock Joo , Dong Pil Jung
发明人： Jun Young Yang , You Ock Joo , Dong Pil Jung
IPC分类号： H01L23/34 , H01L23/06 , H01L23/02
CPC分类号： H01L23/13 , H01L23/3121 , H01L24/32 , H01L24/48 , H01L24/73 , H01L25/16 , H01L2224/16145 , H01L2224/16225 , H01L2224/32014 , H01L2224/32057 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83385 , H01L2924/00011 , H01L2924/00014 , H01L2924/01032 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/07802 , H01L2924/1515 , H01L2924/15153 , H01L2924/15159 , H01L2924/15165 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19105 , H01L2924/30107 , H01L2924/3011 , H05K1/023 , H05K1/183 , H05K2201/09036 , H05K2201/10515 , H05K2201/10674 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a semiconductor device and a passive component mounted and electrically coupled to a substrate. The passive component is disposed within a cavity portion formed on an upper surface of the substrate and the semiconductor device is disposed across the cavity portion of the substrate above the passive component.
摘要翻译：半导体封装包括半导体器件和安装并电耦合到衬底的无源器件。无源部件设置在形成在基板的上表面上的空腔部分内，并且半导体器件横跨无源部件上方的基板的空腔部分设置。

4. 发明授权

US07656047B2 Semiconductor device package and manufacturing method 有权
标题翻译：半导体器件封装及制造方法
公开(公告)号：US07656047B2
公开(公告)日：2010-02-02
申请号：US11898006
申请日：2007-09-07
申请人： Jun Young Yang , You Ock Joo , You Pil Jung
发明人： Jun Young Yang , You Ock Joo , You Pil Jung
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/29 , H01L21/561 , H01L23/3121 , H01L23/3135 , H01L23/552 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The electromagnetic interference shielding layer is a plated metal layer in contact with the package body, and the plated metal layer is connected to a ground trace extending on the upper surface of the substrate.
摘要翻译：半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。电磁干扰屏蔽层是与封装体接触的电镀金属层，并且电镀金属层连接到在基板的上表面上延伸的接地迹线。

5. 发明授权

US07633170B2 Semiconductor device package and manufacturing method thereof 有权
标题翻译：半导体器件封装及其制造方法
公开(公告)号：US07633170B2
公开(公告)日：2009-12-15
申请号：US11028670
申请日：2005-01-05
申请人： Jun Young Yang , You Ock Joo , Dong Pil Jung
发明人： Jun Young Yang , You Ock Joo , Dong Pil Jung
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/552 , H01L21/561 , H01L23/29 , H01L23/3121 , H01L23/3135 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.
摘要翻译：半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。本发明还提供了制造半导体器件封装的方法。

6. 发明申请

US20080042301A1 Semiconductor device package and manufacturing method 有权
标题翻译：半导体器件封装及制造方法
公开(公告)号：US20080042301A1
公开(公告)日：2008-02-21
申请号：US11898006
申请日：2007-09-07
申请人： Jun Young Yang , You Joo , You Pil Jung
发明人： Jun Young Yang , You Joo , You Pil Jung
IPC分类号： H01L23/28
CPC分类号： H01L23/29 , H01L21/561 , H01L23/3121 , H01L23/3135 , H01L23/552 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01087 , H01L2924/07802 , H01L2924/15787 , H01L2924/16152 , H01L2924/181 , H01L2924/19105 , H01L2924/3011 , H01L2924/3025 , H01L2224/85 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The electromagnetic interference shielding layer is a plated metal layer in contact with the package body, and the plated metal layer is connected to a ground trace extending on the upper surface of the substrate.
摘要翻译：半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。电磁干扰屏蔽层是与封装体接触的电镀金属层，并且电镀金属层连接到在基板的上表面上延伸的接地迹线。

7. 发明授权

US07045396B2 Stackable semiconductor package and method for manufacturing same 有权
标题翻译：可堆叠半导体封装及其制造方法
公开(公告)号：US07045396B2
公开(公告)日：2006-05-16
申请号：US10439671
申请日：2003-05-16
申请人： Sean Timothy Crowley , Angel Orabuena Alvarez , Jun Young Yang
发明人： Sean Timothy Crowley , Angel Orabuena Alvarez , Jun Young Yang
IPC分类号： H01L21/44
CPC分类号： H01L23/3107 , H01L23/49551 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/32245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/48245 , H01L2224/48247 , H01L2224/73265 , H01L2225/1029 , H01L2225/1041 , H01L2225/1058 , H01L2924/01013 , H01L2924/01028 , H01L2924/01039 , H01L2924/01046 , H01L2924/0105 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H01L2924/1532 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： Leadframe-type semiconductor packages that allow the semiconductor packages to be stacked on top of each other. One aspect of the semiconductor package includes a leadframe, a plurality of electrical connectors, a semiconductor chip, and a sealing material for encapsulating the above components. The leadframe has a plurality of leads, with each one of the plurality of leads running from the top of the semiconductor package to the bottom of the semiconductor package. Each one of the plurality of leads has a top portion protruding from the top surface of the semiconductor package and a bottom portion protruding from the top surface of the semiconductor package and a bottom portion protruding from the bottom surface of the semiconductor package. The leads allow for electrical connection of a second semiconductor package placed on top of the first semiconductor package. Further, the protruding parts of the leads form a space between the stacked semiconductor packages for improved heat dissipation.
摘要翻译：允许半导体封装层叠在一起的引线框型半导体封装。半导体封装的一个方面包括引线框架，多个电连接器，半导体芯片和用于封装上述部件的密封材料。引线框具有多个引线，多个引线中的每一个引线从半导体封装的顶部延伸到半导体封装的底部。多个引线中的每一个具有从半导体封装的顶表面突出的顶部和从半导体封装的顶表面突出的底部和从半导体封装的底表面突出的底部。引线允许放置在第一半导体封装顶部上的第二半导体封装的电连接。此外，引线的突出部分在堆叠的半导体封装之间形成空间，以改善散热。

8. 发明授权

US08154111B2 Near chip size semiconductor package 有权
标题翻译：近芯片尺寸半导体封装
公开(公告)号：US08154111B2
公开(公告)日：2012-04-10
申请号：US10662248
申请日：2003-09-15
申请人： Sean Timothy Crowley , Angel Orabuena Alvarez , Jun Young Yang
发明人： Sean Timothy Crowley , Angel Orabuena Alvarez , Jun Young Yang
IPC分类号： H01L23/495
CPC分类号： H01L23/4951 , H01L23/3114 , H01L23/49582 , H01L24/45 , H01L24/48 , H01L2224/16245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2924/00014 , H01L2924/01005 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/00 , H01L2224/05599 , H01L2924/00012
摘要： A semiconductor package that can fit semiconductor chips of various sizes without having to change the footprint of the carrier package. One aspect of the semiconductor package comprises a leadframe, a semiconductor chip attached to the leadframe, electrical connectors electrically connecting the semiconductor chip to the leadframe, and a sealing material. The leadframe has a plurality of leads, with each one of the plurality of leads having an upper side, a lower exposed side, and a laterally exposed side. The upper side of each one of the plurality of leads defines a generally co-planar surface. Further, after sealing material encapsulates the components of the semiconductor package in a spatial relationship, the lower exposed side and the lateral exposed side of the plurality of leads are exposed to the outside surface of the semiconductor package.
摘要翻译：半导体封装，可以适应各种尺寸的半导体芯片，而不必改变载体封装的占位面积。半导体封装的一个方面包括引线框架，附接到引线框架的半导体芯片，将半导体芯片电连接到引线框架的电连接器以及密封材料。引线框架具有多个引线，多个引线中的每一个引线具有上侧，下暴露侧和侧向露出侧。多个引线中的每一个的上侧限定了大致共面的表面。此外，在密封材料以空间关系封装半导体封装的部件之后，多个引线的下暴露侧和侧向暴露侧暴露于半导体封装的外表面。

9. 发明授权

US06995448B2 Semiconductor package including passive elements and method of manufacture 失效
公开(公告)号：US06995448B2
公开(公告)日：2006-02-07
申请号：US10107656
申请日：2002-03-25
申请人： Sang Ho Lee , Jun Young Yang , Seon Goo Lee , Jong Hae Hyun , Choon Heung Lee
发明人： Sang Ho Lee , Jun Young Yang , Seon Goo Lee , Jong Hae Hyun , Choon Heung Lee
IPC分类号： H01L29/00 , H01L23/02
CPC分类号： H01L24/32 , H01L23/52 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/83 , H01L25/16 , H01L2224/05554 , H01L2224/05568 , H01L2224/05573 , H01L2224/16145 , H01L2224/16225 , H01L2224/27013 , H01L2224/32057 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/83051 , H01L2224/83385 , H01L2924/00014 , H01L2924/01013 , H01L2924/01033 , H01L2924/01079 , H01L2924/07802 , H01L2924/10162 , H01L2924/14 , H01L2924/15151 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/181 , H01L2924/1815 , H01L2924/18161 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/351 , Y10S257/927 , H01L2924/00012 , H01L2924/3512 , H01L2924/00 , H01L2224/05599
摘要： A semiconductor package including passive elements and a method of manufacturing provide reduced package size, improved performance and higher process yield by mounting the passive elements beneath the semiconductor die on the substrate. The semiconductor die may be mounted above the passive elements by mechanically bonding the semiconductor die to the passive elements, mounting the passive elements within a recess in the substrate or mounting the semiconductor using an adhesive retaining wall on the substrate that protrudes above and extends around the passive elements. The recess may include an aperture through the substrate to vent the package to the outside environment or may comprise an aperture through the substrate and larger than the semiconductor die, permitting the encapsulation to entirely fill the aperture, covering the die and the passive elements to secure them mechanically within the package.

10. 发明授权

US06730544B1 Stackable semiconductor package and method for manufacturing same 有权
标题翻译：可堆叠半导体封装及其制造方法
公开(公告)号：US06730544B1
公开(公告)日：2004-05-04
申请号：US09687530
申请日：2000-10-13
申请人： Jun Young Yang
发明人： Jun Young Yang
IPC分类号： H01L2144
CPC分类号： H01L23/49555 , H01L23/3107 , H01L23/49548 , H01L24/45 , H01L24/48 , H01L25/105 , H01L2224/05599 , H01L2224/32245 , H01L2224/45124 , H01L2224/45139 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/85399 , H01L2225/1029 , H01L2225/1041 , H01L2924/00014 , H01L2924/01039 , H01L2924/01046 , H01L2924/01079 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207
摘要： A stackable semiconductor package having a lead frame, a plurality of electrical paths, and a sealing material. The leadframe has a plurality of leads, each one of the plurality of leads having a top portion exposed to a top surface of the semiconductor package and a bottom portion resting flush with a bottom surface of the semiconductor package. In this manner, the leads extending from the top surface to the bottom surface of the semiconductor package provide an electrical path for connecting and electrically powering a second semiconductor package stacked on top of a first bottom semiconductor package.
摘要翻译：一种具有引线框架，多个电路径和密封材料的可堆叠半导体封装。引线框架具有多个引线，多个引线中的每一个引线具有暴露于半导体封装的顶表面的顶部部分和与半导体封装的底表面齐平的底部。以这种方式，从半导体封装的顶表面延伸到底表面的引线提供用于连接和电力供应堆叠在第一底部半导体封装顶部上的第二半导体封装的电路径。

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