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    • 1. 发明申请
    • STORAGE SYSTEM
    • 存储系统
    • US20110099391A1
    • 2011-04-28
    • US12908301
    • 2010-10-20
    • Junichi OGAWAYuichi Sakagami
    • Junichi OGAWAYuichi Sakagami
    • G06F1/26
    • G06F1/266
    • A storage system includes: a basic apparatus for transmitting an access request through a data input line for transmitting data; and an extension apparatus for receiving an access request from the basic apparatus through the data input line, the extension apparatus including a storage for storing data and a controller for controlling the access request from the basic apparatus, wherein the basic apparatus superimposes a voltage to the data input line in accordance with the access request, and wherein the extension apparatus includes an upper input voltage detector for detecting the voltage superimposed on the upper data input line and includes a power controller for controlling the power supply to the controller on the basis of the detected voltage.
    • 存储系统包括:用于通过用于发送数据的数据输入线发送访问请求的基本装置; 以及用于通过数据输入线从基本装置接收访问请求的扩展装置,扩展装置包括用于存储数据的存储器和用于控制来自基本装置的访问请求的控制器,其中基本装置将电压叠加到 数据输入线,并且其中所述扩展装置包括用于检测叠加在所述上数据输入线上的电压的上输入电压检测器,并且包括功率控制器,用于基于所述控制器的电源控制 检测电压。
    • 2. 发明授权
    • Storage system
    • 存储系统
    • US08601303B2
    • 2013-12-03
    • US12908301
    • 2010-10-20
    • Junichi OgawaYuichi Sakagami
    • Junichi OgawaYuichi Sakagami
    • G06F1/00
    • G06F1/266
    • A storage system includes: a basic apparatus for transmitting an access request through a data input line for transmitting data; and an extension apparatus for receiving an access request from the basic apparatus through the data input line, the extension apparatus including a storage for storing data and a controller for controlling the access request from the basic apparatus, wherein the basic apparatus superimposes a voltage to the data input line in accordance with the access request, and wherein the extension apparatus includes an upper input voltage detector for detecting the voltage superimposed on the upper data input line and includes a power controller for controlling the power supply to the controller on the basis of the detected voltage.
    • 存储系统包括:用于通过用于发送数据的数据输入线发送访问请求的基本装置; 以及用于通过数据输入线从基本装置接收访问请求的扩展装置,扩展装置包括用于存储数据的存储器和用于控制来自基本装置的访问请求的控制器,其中基本装置将电压叠加到 数据输入线,并且其中所述扩展装置包括用于检测叠加在所述上数据输入线上的电压的上输入电压检测器,并且包括功率控制器,用于基于所述控制器的电源控制 检测电压。
    • 6. 发明授权
    • Storage apparatus
    • 储存装置
    • US08738936B2
    • 2014-05-27
    • US12790983
    • 2010-05-31
    • Yuichi Sakagami
    • Yuichi Sakagami
    • G06F1/32G06F1/26G06F3/06
    • G06F1/3203G06F1/3209G06F1/3268G06F3/0625Y02D10/154
    • A storage apparatus connectable to an external apparatus through a connection line for data communication includes: a storage for storing data; a system controller for controlling data communication with the external apparatus through the connection line so as to allow the external apparatus to access the storage; and a power controller for controlling power supply to the storage, wherein the system controller controls the power controller to initiate supply of a power to the storage after establishing a communication linkage with the external apparatus through the connection line.
    • 通过用于数据通信的连接线可连接到外部设备的存储设备包括:用于存储数据的存储器; 系统控制器,用于通过连接线控制与外部设备的数据通信,以允许外部设备访问存储器; 以及功率控制器,用于控制对所述存储器的电力供应,其中所述系统控制器控制所述功率控制器,以在通过所述连接线建立与所述外部设备的通信联动之后开始向所述存储器供电。
    • 8. 发明申请
    • Apparatus for transmitting data via the I2C bus, method of transmitting data via the I2C bus, and program for transmitting data via the I2C bus
    • 通过I2C总线传输数据的设备,通过I2C总线传输数据的方法,以及通过I2C总线传输数据的程序
    • US20070150684A1
    • 2007-06-28
    • US11376181
    • 2006-03-16
    • Yuichi Sakagami
    • Yuichi Sakagami
    • G06F13/28G06F12/00
    • G06F13/4291G06F11/348G06F11/349
    • An apparatus and the like for transmitting data via an I2C bus, which is simple in structure and can yet accumulate data transmitted via the I2C bus, thereby to analyze errors in the I2C bus easily. The apparatus comprises a memory circuit 4 connected to the I2C bus that connects a master 1 and a slave 2. The initial I2C address of the memory circuit 4 is set to the same I2C address as that of the slave 2 in order to write data into the slave 2. The data to be written into the slave 2 is saved in the memory circuit 4, and the I2C address of the memory circuit is set back to the initial I2C address after the data has been written into the slave 2. Thus, the data can be stored in the memory circuit before it is written into the slave and can be read from the memory circuit without influencing the operation of reading data from the slave.
    • 用于通过I2C总线发送数据的装置等,其结构简单,并且可以积累经由I2C总线发送的数据,从而易于分析I2C总线中的错误。 该装置包括连接到连接主机1和从机2的I2C总线的存储器电路4。 存储器电路4的初始I2C地址被设置为与从机2相同的I2C地址,以便将数据写入从机2。 要写入从机2的数据被保存在存储器电路4中,并且在将数据写入从机2之后,存储器电路的I2C地址被设置回初始I2C地址。 因此,数据可以在写入从机之前存储在存储器电路中,并且可以从存储器电路读取,而不影响从从机读取数据的操作。