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    • 2. 发明授权
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • US09543020B2
    • 2017-01-10
    • US13787730
    • 2013-03-06
    • Kabushiki Kaisha Toshiba
    • Yuya Suzuki
    • G11C16/10G11C16/34G11C16/04
    • G11C16/10G11C16/0483G11C16/3459
    • A nonvolatile semiconductor memory device includes an array of memory cells arranged at the position intersecting positions of the word line and the bit line, a control signal generating circuit for carrying out a writing operation including a program for carrying out writing in the memory cell and a verification for verifying whether the data has been correctly written in the memory cell by the program, and a cell source monitoring circuit for detecting a voltage of the source line connected to the memory cell during the writing operation. The control signal generating circuit directly shifts the source line voltage at the time of program to a lower voltage necessary at the time of verification after the end of the program, based on the voltage the source line detected by the cell source monitoring circuit.
    • 非易失性半导体存储器件包括布置在与字线和位线相交位置的位置处的存储器单元的阵列,用于执行包括用于在存储器单元中执行写入的程序的写入操作的控制信号发生电路和 用于验证数据是否已被程序正确写入存储单元的单元源监视电路,以及用于在写入操作期间检测连接到存储单元的源极线的电压的单元源监视电路。 控制信号发生电路基于由单元源监视电路检测的源极线的电压,直接将程序时的源极线电压移动到程序结束之后的验证时所需的较低电压。