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1. 发明授权

US11483187B2 High speed communications system 有权
公开(公告)号：US11483187B2
公开(公告)日：2022-10-25
申请号：US17468405
申请日：2021-09-07
申请人： Kandou Labs SA
发明人： Ali Hormati , Armin Tajalli , Amin Shokrollahi
IPC分类号： H04L25/03 , H04L1/00 , H04L25/49
摘要： Transmission of baseband and carrier-modulated vector codewords, using a plurality of encoders, each encoder configured to receive information bits and to generate a set of baseband-encoded symbols representing a vector codeword; one or more modulation circuits, each modulation circuit configured to operate on a corresponding set of baseband-encoded symbols, and using a respective unique carrier frequency, to generate a set of carrier-modulated encoded symbols; and, a summation circuit configured to generate a set of wire-specific outputs, each wire-specific output representing a sum of respective symbols of the carrier-modulated encoded symbols and at least one set of baseband-encoded symbols.

2. 发明授权

US11368247B2 Multi-wire permuted forward error correction 有权
公开(公告)号：US11368247B2
公开(公告)日：2022-06-21
申请号：US16909525
申请日：2020-06-23
申请人： Kandou Labs SA
发明人： Amin Shokrollahi , Ali Hormati
IPC分类号： H03M13/00 , H04L1/00 , H04L25/02 , H03M13/05 , H04J13/00 , H04L25/08 , H03M13/15 , H03M13/37 , H03M13/27
摘要： Methods and systems are described for obtaining a plurality of information bits, and responsively partitioning the obtained plurality of information bits into a plurality of subsets of information bits, generating a plurality of streams of forward error correction (FEC)-encoded bits using a plurality of FEC encoders receiving respective subsets of the plurality of subsets of information bits, providing the plurality of streams of FEC-encoded bits to a plurality of sub-channel encoders, each sub-channel encoder receiving a respective stream of FEC-encoded bits from a different FEC encoder of the plurality of FEC encoders for generating a set of codewords of a vector signaling code, and wherein sequential streams of FEC-encoded bits from a given FEC encoder are provided to different sub-channel encoders for each successively generated set of codewords, and transmitting the successively generated sets of codewords of the vector signaling code over a multi-wire bus.

3. 发明授权

US11336302B2 Pipelined forward error correction for vector signaling code channel 有权
公开(公告)号：US11336302B2
公开(公告)日：2022-05-17
申请号：US16883763
申请日：2020-05-26
申请人： Kandou Labs SA
发明人： Amin Shokrollahi , Dario Carnelli
IPC分类号： H03M13/15 , H03M13/00 , H04L1/00 , H03M13/37 , H03M13/09
摘要： Decoding sequentially received vector signaling codewords to obtain sequential sets of data bits, wherein elements of each vector signaling codeword are received in parallel over a plurality of wires, generating an incremental update of a plurality of error correction syndrome values based on each sequential set of data bits according to a check matrix, and upon decoding of a final vector signaling codeword, performing a final incremental update of the plurality of error correction syndrome values and responsively modifying data bits within the sequential sets of data bits by selecting a set of data bits from the sequential sets of data bits according to a symbol position index determined from the plurality of error correction syndrome values, the selected set of data bits altered according to a bit error mask determined from a first error correction syndrome value of the plurality of error correction syndrome values.

4. 发明申请

US20210288740A1 METHOD AND APPARATUS FOR LOW POWER CHIP-TO-CHIP COMMUNICATIONS WITH CONSTRAINED ISI RATIO 有权
公开(公告)号：US20210288740A1
公开(公告)日：2021-09-16
申请号：US17336082
申请日：2021-06-01
申请人： Kandou Labs SA
发明人： Amin Shokrollahi , Ali Hormati , Roger Ulrich
IPC分类号： H04J13/00 , H04L25/03 , H04L25/02 , H04L25/14 , H04L25/49
摘要： An efficient communications apparatus is described for a vector signaling code to transport data and optionally a clocking signal between integrated circuit devices. Methods of designing such apparatus and their associated codes based on a new metric herein called the “ISI Ratio” are described which permit higher communications speed, lower system power consumption, and reduced implementation complexity.

5. 发明申请

US20200295785A1 PIPELINED FORWARD ERROR CORRECTION FOR VECTOR SIGNALING CODE CHANNEL 审中-公开
公开(公告)号：US20200295785A1
公开(公告)日：2020-09-17
申请号：US16883763
申请日：2020-05-26
申请人： Kandou Labs SA
发明人： Amin Shokrollahi , Dario Carnelli
IPC分类号： H03M13/15 , H03M13/00 , H04L1/00 , H03M13/37 , H03M13/09
摘要： Decoding sequentially received vector signaling codewords to obtain sequential sets of data bits, wherein elements of each vector signaling codeword are received in parallel over a plurality of wires, generating an incremental update of a plurality of error correction syndrome values based on each sequential set of data bits according to a check matrix, and upon decoding of a final vector signaling codeword, performing a final incremental update of the plurality of error correction syndrome values and responsively modifying data bits within the sequential sets of data bits by selecting a set of data bits from the sequential sets of data bits according to a symbol position index determined from the plurality of error correction syndrome values, the selected set of data bits altered according to a bit error mask determined from a first error correction syndrome value of the plurality of error correction syndrome values.

6. 发明授权

US09509437B2 Vector signaling code with improved noise margin 有权
标题翻译：矢量信令码，具有改善的噪声容限
公开(公告)号：US09509437B2
公开(公告)日：2016-11-29
申请号：US14711528
申请日：2015-05-13
申请人： Kandou Labs SA
发明人： Amin Shokrollahi
IPC分类号： H04B1/66 , H03M7/00 , H04L1/00 , H04L25/49 , B41J2/00 , H04L25/02 , H04J13/12
CPC分类号： H04L25/4917 , B41J2/00 , H04J13/12 , H04L1/00 , H04L1/0041 , H04L25/02 , H04L25/0272 , H04L25/49 , H04L25/4906
摘要： Methods are described allowing a vector signaling code to encode multi-level data without the significant alphabet size increase known to cause symbol dynamic range compression and thus increased noise susceptibility. By intentionally restricting the number of codewords used, good pin efficiency may be maintained along with improved system signal-to-noise ratio.
摘要翻译：描述允许矢量信令码对多电平数据进行编码而不会导致符号动态范围压缩导致符号动态范围压缩并因此增加噪声敏感性的显着字母尺寸增加的方法。通过有意地限制使用的码字的数量，可以保持良好的引脚效率以及改进的系统信噪比。

7. 发明授权

US09444654B2 Multidrop data transfer 有权
标题翻译：多点数据传输
公开(公告)号：US09444654B2
公开(公告)日：2016-09-13
申请号：US14803996
申请日：2015-07-20
申请人： Kandou Labs SA
发明人： Ali Hormati , Amin Shokrollahi
IPC分类号： H04B1/10 , H04L25/02 , G06F13/38
CPC分类号： H04L25/0272 , G06F13/38 , H04L25/4906 , H04L25/4917
摘要： Multi-drop communications channels can have significantly deep notches in their frequency response causing a corresponding limitation of the effective data transmission rate. A special time-ordered coding method is described which results in the emitted spectrum of the data stream transmitted into the channel having a notch at the same frequency as the notch in the channel frequency response, permitting channel receivers to successfully decode the transmitted data stream. The described coding method may be applied at various multiples of the channel notch frequency to support different throughput rates, and may be combined with other coding techniques such as group or vector signaling codes.
摘要翻译：多点通信信道在其频率响应中可能具有显着深的陷波，导致有效数据传输速率的相应限制。描述了一种特殊的时间有序编码方法，其导致发送到具有与信道频率响应中的陷波相同频率的陷波的信道中的数据流的发射频谱，允许信道接收机成功解码所发送的数据流。所描述的编码方法可以应用于信道陷波频率的不同倍数以支持不同的吞吐率，并且可以与诸如组或向量信令码的其他编码技术组合。

8. 发明授权

US09363114B2 Clock-embedded vector signaling codes 有权
标题翻译：时钟嵌入矢量信令码
公开(公告)号：US09363114B2
公开(公告)日：2016-06-07
申请号：US14636098
申请日：2015-03-02
申请人： Kandou Labs SA
发明人： Amin Shokrollahi , Brian Holden , Richard Simpson
IPC分类号： H04L25/00 , H04L25/08 , H04L25/03 , H04L25/49
CPC分类号： H04L25/49 , H04L25/03006 , H04L25/03057 , H04L25/08 , H04L25/085
摘要： Vector signaling codes providing guaranteed numbers of transitions per unit transmission interval are described, along with methods and systems for their generation and use. The described architecture may include multiple communications sub-systems, each having its own communications wire group or sub-channel, clock-embedded signaling code, pre- and post-processing stages to guarantee the desired code transition density, and global encoding and decoding stages to first distribute data elements among the sub-systems, and then to reconstitute the received data from its received sub-system elements.
摘要翻译：描述了提供每单位传输间隔保证数量的转换的向量信令码，以及用于其生成和使用的方法和系统。所描述的架构可以包括多个通信子系统，每个子系统具有其自己的通信线组或子信道，时钟嵌入式信令代码，预处理和后处理阶段以保证期望的代码转换密度，以及全局编码和解码阶段首先在子系统之间分配数据元素，然后从接收到的子系统元素重建接收到的数据。

9. 发明授权

US09275720B2 Differential vector storage for dynamic random access memory 有权
标题翻译：用于动态随机存取存储器的差分矢量存储
公开(公告)号：US09275720B2
公开(公告)日：2016-03-01
申请号：US13843785
申请日：2013-03-15
申请人： Kandou Labs, SA
发明人： Harm Cronie , Amin Shokrollahi
IPC分类号： G11C11/24 , G11C11/408 , G11C7/10 , G11C11/406 , G11C11/56 , H03M7/20
CPC分类号： G11C11/4087 , G11C7/1006 , G11C11/406 , G11C11/4096 , G11C11/565 , H03M7/20
摘要： A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2n distinct inputs can be encoded into k-entry codewords for some n>k. A vector storage element comprising k cells can store an k electrical quantities (voltage, current, etc.) corresponding to a codeword. The voltage code is such that, for at least one position of a vector, there are at least three vectors having distinct entry values at that position and, for at least a subset of the possible codewords, the sum of the entry values over the positions of the each vector is constant from vector to vector in that subset. The storage device might be an integrated circuit device, a discrete memory device, or a device having embedded memory.
摘要翻译：存储装置使用与电压代码字对应的矢量存储存储单元组的数据，每个码字具有k个条目。条目具有从一组至少三个条目值中选择的值，并且对于某些n> k，2n个不同的输入可被编码为k个入口码字。包括k个单元的矢量存储元件可以存储对应于码字的k个电量（电压，电流等）。电压代码使得对于向量的至少一个位置，存在至少三个向量，在该位置具有不同的入口值，并且对于至少一个可能的码字的子集，在位置上的入口值的和的每个向量在该子集中从向量到向量是不变的。存储设备可以是集成电路设备，分立存储设备或具有嵌入式存储器的设备。

10. 发明授权

US09251873B1 Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications 有权
标题翻译：使用矢量信令代码进行芯片到芯片通信的针对高效存储器控制器接口的方法和系统
公开(公告)号：US09251873B1
公开(公告)日：2016-02-02
申请号：US14108316
申请日：2013-12-16
申请人： Kandou Labs SA
发明人： John Fox , Brian Holden , Amin Shokrollahi , Anant Singh , Giuseppe Surace
IPC分类号： G11C7/10 , G11C7/22 , G06F13/42 , G06F13/16
CPC分类号： G11C7/22 , G06F13/1689 , G06F13/385 , G06F13/4243 , G11C7/10 , G11C7/1072 , G11C8/10
摘要： Systems and methods are described for transmitting data over physical channels to provide a high speed, low latency interface such as between a memory controller and memory devices. Controller-side and memory-side embodiments of such channel interfaces are disclosed which require a low pin count and have low power utilization. In some embodiments of the invention, different voltage, current, etc. levels are used for signaling and more than two levels may be used, such as a vector signaling code wherein each wire signal may take on one of four signal values.
摘要翻译：描述了通过物理信道传输数据以提供诸如存储器控制器和存储器件之间的高速，低延迟接口的系统和方法。公开了这样的信道接口的控制器侧和存储器侧实施例，其需要低引脚数并具有低功率利用率。在本发明的一些实施例中，不同的电压，电流等级用于信令，并且可以使用多于两个级别，例如矢量信令代码，其中每个有线信号可以采用四个信号值之一。

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