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1. 发明申请

US20100265239A1 PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 有权
标题翻译：用于形成电光显示器的背板的方法
公开(公告)号：US20100265239A1
公开(公告)日：2010-10-21
申请号：US12825991
申请日：2010-06-29
申请人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
发明人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： G06F3/038 , H01J9/24 , H01L21/20
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

2. 发明授权

US07785988B2 Processes for forming backplanes for electro-optic displays 有权
标题翻译：用于形成电光显示器背板的工艺
公开(公告)号：US07785988B2
公开(公告)日：2010-08-31
申请号：US12243411
申请日：2008-10-01
申请人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
发明人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： H01L21/30
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

3. 发明申请

US20090029527A1 PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 有权
标题翻译：用于形成电光显示器的背板的方法
公开(公告)号：US20090029527A1
公开(公告)日：2009-01-29
申请号：US12243411
申请日：2008-10-01
申请人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
发明人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： H01L21/64
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

4. 发明授权

US08389381B2 Processes for forming backplanes for electro-optic displays 有权
标题翻译：用于形成电光显示器背板的工艺
公开(公告)号：US08389381B2
公开(公告)日：2013-03-05
申请号：US12825991
申请日：2010-06-29
申请人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
发明人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： H01L21/30
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

5. 发明授权

US07442587B2 Processes for forming backplanes for electro-optic displays 失效
标题翻译：用于形成电光显示器背板的工艺
公开(公告)号：US07442587B2
公开(公告)日：2008-10-28
申请号：US11424258
申请日：2006-06-15
申请人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
发明人： Karl R. Amundson , Guy M. Danner , Gregg M. Duthaler , Peter T. Kazlas , Yu Chen , Kevin L. Denis , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： H01L21/00
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖栅极电极的沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

6. 发明授权

US07223672B2 Processes for forming backplanes for electro-optic displays 有权
标题翻译：用于形成电光显示器背板的工艺
公开(公告)号：US07223672B2
公开(公告)日：2007-05-29
申请号：US10249624
申请日：2003-04-24
申请人： Peter T. Kazlas , Nathan R. Kane , Andrew P. Ritenour
发明人： Peter T. Kazlas , Nathan R. Kane , Andrew P. Ritenour
IPC分类号： H01L21/30
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.
摘要翻译：通过将基板固定到刚性载体上，形成非线性元件，然后将柔性基板与载体分离，在柔性基板上形成非线性元件。该方法允许柔性基底在旨在处理刚性基底的常规晶圆中进行加工。在第二种方法中，通过形成栅电极，沉积介电层，半导体层和导电层，在绝缘基板上形成晶体管，图案化导电层以形成源极，漏极和像素电极，覆盖该沟道区具有耐蚀刻材料的合成晶体管和使用耐蚀刻材料和导电层作为掩模的蚀刻，蚀刻基本上延伸通过相邻晶体管之间的半导体层。本发明还提供了一种通过在衬底上沉积第一导电层以及第二图案化导电层和在第一导电层的部分上的图案化电介质层在衬底上形成二极管的工艺，并且使用第二导电层和介电层作为蚀刻掩模。最后，本发明提供一种驱动脉冲敏感电光显示器的方法。

7. 发明授权

US07893435B2 Flexible electronic circuits and displays including a backplane comprising a patterned metal foil having a plurality of apertures extending therethrough 有权
标题翻译：柔性电子电路和显示器包括背板，该背板包括具有延伸穿过其中的多个孔的图案化金属箔
公开(公告)号：US07893435B2
公开(公告)日：2011-02-22
申请号：US10707184
申请日：2003-11-25
申请人： Peter T. Kazlas , Joanna F. Au , Yu Chen , Nathan R. Kane , David John Cole
发明人： Peter T. Kazlas , Joanna F. Au , Yu Chen , Nathan R. Kane , David John Cole
IPC分类号： H01L29/04
CPC分类号： G02F1/133305 , G02F1/167 , H01L29/66765 , H01L29/78603 , Y10T156/10
摘要： A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.
摘要翻译：用于电光显示器的底板包括具有延伸穿过其中的多个孔的图案化金属箔，其至少涂覆有绝缘聚合物材料并且具有设置在绝缘聚合物材料上的多个薄膜电子器件。

8. 发明申请

US20110140744A1 FLEXIBLE ELECTRONIC CIRCUITS AND DISPLAYS 审中-公开
标题翻译：柔性电子电路和显示器
公开(公告)号：US20110140744A1
公开(公告)日：2011-06-16
申请号：US12987418
申请日：2011-01-10
申请人： Peter T. Kazlas , Joanna F. Au , Yu Chen , Nathan R. Kane
发明人： Peter T. Kazlas , Joanna F. Au , Yu Chen , Nathan R. Kane
IPC分类号： H03K3/00 , G02B26/00 , H05K7/00 , G02B1/10 , H05K13/00 , B32B37/06 , B32B37/10 , B32B37/12 , B32B37/14 , B32B38/00
CPC分类号： G02F1/133305 , G02F1/167 , H01L29/66765 , H01L29/78603 , Y10T156/10
摘要： A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.
摘要翻译：用于电光显示器的底板包括具有延伸穿过其中的多个孔的图案化金属箔，其至少涂覆有绝缘聚合物材料并且具有设置在绝缘聚合物材料上的多个薄膜电子器件。

9. 发明授权

US6054194A Mathematically optimized family of ultra low distortion bellow fold patterns 失效
标题翻译：数学优化的超低失真波纹褶皱图案系列
公开(公告)号：US6054194A
公开(公告)日：2000-04-25
申请号：US798064
申请日：1997-02-11
申请人： Nathan R. Kane
发明人： Nathan R. Kane
IPC分类号： B60D5/00 , B61D17/22 , B32B3/28
CPC分类号： B60D5/003 , B61D17/22 , Y10T428/24686
摘要： An improved mathematically modeled family of bellow fold patterns, useful for making bellows from stiff but foldable materials, which forms a corner of a bellow consisting of a series of several single inversion fold patterns, each having a characteristic design angle which is mathematically computed to provide a desired initial wall angle for the bellow and to minimize wall tilting over a predetermined extension angle range, thereby allowing low cost bellows to be made which can extend long distances while using a minimal amount of stiff but foldable material. In addition, each characteristic design angle can be computed to provide exactly zero tilting of the bellow walls at one or more non-zero extension lengths specified by a designer, thus allowing, unlike all other prior art folds, a structurally stiff, long extending bellow to be formed in an extended state using fast production techniques such as vacuum forming, blow molding or injection molding, while also allowing the bellow to be free of distortion in the compressed state.
摘要翻译：一种改进的数学建模的波纹褶皱图案系列，可用于从刚性但可折叠的材料制造波纹管，其形成波纹管的角部，该波纹管由一系列几个单反转折叠图案组成，每个具有特征设计角度，其被数学计算以提供用于波纹管的期望的初始壁角，并且在预定的延伸角范围内最小化壁倾斜，从而允许制造低成本波纹管，其可以在使用最小量的刚性但可折叠的材料的情况下延长长距离。此外，可以计算每个特征设计角度，以便在由设计者指定的一个或多个非零延伸长度处提供波纹管壁的完全零倾斜，从而允许与所有其它现有技术折叠不同的结构上刚性的长延伸波纹管使用诸如真空成型，吹塑或注射成型之类的快速生产技术在延伸状态下形成，同时还允许波纹管在压缩状态下没有变形。

10. 发明授权

US07682082B2 Compact surface self-compensated hydrostatic bearings 有权
标题翻译：紧凑型表面自补偿静液压轴承
公开(公告)号：US07682082B2
公开(公告)日：2010-03-23
申请号：US11818017
申请日：2007-06-13
申请人： Nathan R. Kane , Joachim Sihler , Alexander H. Slocum , Mark Walter
发明人： Nathan R. Kane , Joachim Sihler , Alexander H. Slocum , Mark Walter
IPC分类号： F16C32/06 , F16C29/00
CPC分类号： F16C32/064 , F16C29/025 , F16C32/0696
摘要： A compact surface self-compensated hydrostatic bearing includes a rotor assembly including a rotor plate having upper and lower fluid restricting faces, a rotor top and bottom, each having bearing surfaces angled with respect to an axis of rotation of the rotor assembly; a stator assembly including a stator top and a stator bottom housing the rotor assembly therebetween, the stator top and bottom having bearing surfaces facing and spaced apart from the rotor top and bottom bearing surfaces forming upper and lower bearing gaps, respectively, therebetween; the stator top and bottom including a lower and an upper fluid restricting surface, respectively, facing and spaced apart from the rotor upper and rotor lower fluid restricting faces, respectively, forming upper and lower restricting gaps, respectively, therebetween; and a fluid supply system configured to supply pressurized fluid to the bearing gaps and into the upper and lower fluid restricting gaps.
摘要翻译：紧凑的表面自补偿静液压轴承包括转子组件，转子组件包括具有上流体限制面和下流体限制面的转子板，转子顶部和底部，每个具有相对于转子组件的旋转轴线成角度的轴承表面; 定子组件包括定子顶部和定子底部，其中转子组件位于它们之间，定子顶部和底部具有面对并分别与转子顶部和底部轴承表面间隔开的转子顶部和底部轴承表面的轴承表面; 所述定子的顶部和底部分别包括下部和上部流体限制表面，所述下部和上部流体限制表面分别与所述转子上部和下部流体限制面相对并间隔开，并分别在其间形成上部和下部限制间隙; 以及流体供应系统，其构造成将加压流体供应到所述轴承间隙并进入所述上部和下部流体限制间隙。

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