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1. 发明授权

US08065524B2 Authentication processing apparatus and authentication processing method 有权
标题翻译：认证处理设备和认证处理方法
公开(公告)号：US08065524B2
公开(公告)日：2011-11-22
申请号：US11677742
申请日：2007-02-22
申请人： Kiyotaka Iwamoto , Eiichi Moriyama , Ryogo Yanagisawa , Isamu Ishimura
发明人： Kiyotaka Iwamoto , Eiichi Moriyama , Ryogo Yanagisawa , Isamu Ishimura
IPC分类号： H04L9/32 , H04N7/167
CPC分类号： G06F21/34 , G06F21/40
摘要： An authentication processing apparatus includes an authentication unit, having a circuit that performs authentication phases included in processing for authenticating an external device. A command holding unit holds a first command that indicates whether or not each of the authentication phases is performed by the authentication unit. An authentication controller causes the authentication unit to perform an authentication phase that is indicated, by the first command, to be performed by the authentication unit. A CPU performs software processing of an authentication phase that is indicated, by the first command, not to be performed by the authentication unit.
摘要翻译：认证处理装置包括认证单元，该认证单元具有执行用于认证外部设备的处理中包括的认证阶段的电路。命令保持单元保存指示每个认证阶段是否由认证单元执行的第一命令。认证控制器使认证单元执行由认证单元执行的由第一命令指示的认证阶段。 CPU执行认证阶段的软件处理，该验证阶段由第一命令指示不由验证单元执行。

2. 发明授权

US07941864B2 Audio-video output apparatus, authentication processing method, and audio-video processing system 有权
标题翻译：音频 - 视频输出设备，认证处理方法和音频 - 视频处理系统
公开(公告)号：US07941864B2
公开(公告)日：2011-05-10
申请号：US11942914
申请日：2007-11-20
申请人： Kiyotaka Iwamoto , Isamu Ishimura
发明人： Kiyotaka Iwamoto , Isamu Ishimura
IPC分类号： H04L9/00
CPC分类号： G11B20/00086 , G11B20/00188 , H04L9/3247 , H04L2209/603 , H04N5/4401 , H04N5/765 , H04N5/775 , H04N5/85 , H04N5/913 , H04N21/2585 , H04N21/43615 , H04N21/43632 , H04N21/4367 , H04N21/4627
摘要： An audio-video output apparatus of the present invention outputs at least one of audio data and video data to a receiving apparatus using High-Definition Multimedia Interface (HDMI) communications. The audio-video output apparatus includes a list holding unit, an authenticating unit, a list acquiring unit, an updating unit, and an apparatus verifying unit. The list holding unit holds an unauthorized apparatus list which shows information about unauthorized apparatuses. The authenticating unit performs first apparatus authentication to verify whether or not the receiving apparatus is an authorized apparatus using the unauthorized apparatus list held by the list holding unit, and performs second apparatus authentication at regular intervals to verify the receiving apparatus is an authorized apparatus. The list acquiring unit acquires another unauthorized apparatus list. When the unauthorized apparatus list acquired by the list acquiring unit is newer than the unauthorized apparatus list held by the list holding unit, the updating unit updates the unauthorized apparatus list held by the list holding unit to the unauthorized apparatus list acquired by the list acquiring unit. When the unauthorized apparatus list is updated by the updating unit, the apparatus verifying unit verifies whether or not the receiving apparatus is an authorized apparatus using the updated unauthorized apparatus list, the verification being performed in parallel with the second apparatus authentication performed by the authenticating unit.
摘要翻译：本发明的音频 - 视频输出设备使用高清晰度多媒体接口（HDMI）通信将音频数据和视频数据中的至少一个输出到接收设备。音频视频输出设备包括列表保存单元，认证单元，列表获取单元，更新单元和设备验证单元。列表保存单元保存有关未经授权的设备的信息的未经授权的设备列表。认证单元执行第一设备认证，以验证接收设备是否是使用由列表保存单元保存的未授权设备列表的授权设备，并且以规则间隔执行第二设备认证以验证接收设备是授权设备。列表获取单元获取另一未经授权的设备列表。当由列表获取单元获取的未授权装置列表比由列表保存单元保持的未授权装置列表更新时，更新单元将由列表保存单元保存的未授权装置列表更新为由列表获取单元获取的未授权装置列表。当更新单元更新未经授权的设备列表时，设备验证单元使用更新的未经授权的设备列表来验证接收设备是否是授权设备，验证与由认证单元执行的第二设备认证并行执行。

3. 发明授权

US07266630B2 CPU contained LSI 失效
标题翻译： CPU包含LSI
公开(公告)号：US07266630B2
公开(公告)日：2007-09-04
申请号：US10735630
申请日：2003-12-16
申请人： Isamu Ishimura , Shinobu Machida
发明人： Isamu Ishimura , Shinobu Machida
IPC分类号： G06F13/36
CPC分类号： G06F13/36
摘要： In a system in which a CPU contained LSI and an external CPU share a bus, when the external CPU accesses a device to be controlled which is connected to a bus, the access to a device mounted on the common bus is not prevented in the CPU contained LSI. A CPU contained LSI includes a CPUa, common address/data buses 111 and 112 connected to the CPUa, CPUb address/data buses 211 and 212 connected to a CPUb, and a bus adjusting circuit 105 disposed between the common address/data buses and the CPUb address/data buses to exclusively control accesses from the CPUa and the CPUb to a device connected to the common address/data buses and connect the CPUb adress/data buses to the common address/data buses only when the CPUb is permitted to access the device connected to the common address/data buses.
摘要翻译：在包含LSI和外部CPU的CPU共享总线的系统中，当外部CPU访问要连接到总线的被控制的设备时，在CPU中不会阻止对安装在公共总线上的设备的访问包含LSI。包括LSI的CPU包括CPUa，连接到CPUa的公共地址/数据总线111和112，连接到CPUb的CPUb地址/数据总线211和212以及布置在公共地址/数据总线和总线调制电路105之间的总线调整电路105。 CPUb地址/数据总线专门控制从CPUa和CPUb到连接到公共地址/数据总线的设备的访问，只有当CPUb被允许访问CPUb地址/数据总线时才将CPUb地址/数据总线连接到公共地址/数据总线设备连接到公共地址/数据总线。

4. 发明授权

US07839896B2 Video transmission system 有权
标题翻译：视频传输系统
公开(公告)号：US07839896B2
公开(公告)日：2010-11-23
申请号：US12175047
申请日：2008-07-17
申请人： Isamu Ishimura
发明人： Isamu Ishimura
IPC分类号： H04H20/28 , H04J1/00 , H04J3/02 , H04N7/14 , H04N5/91
CPC分类号： H04N5/775 , H04N5/4401 , H04N5/85 , H04N5/935 , H04N5/937 , H04N21/43635
摘要： In transmission of video signals of a plurality of channels using a digital interface in conformity with the high definition multimedia interface (HDMI) standard, a transmission minimized differential signaling (TMDS) mixing circuit and a TMDS separation circuit are provided, to perform time-division transmission of TMDS data of the video signals of the plurality of channels at a frequency higher than the transmission rate of the video signals. Video signals of a plurality of channels are therefore transmitted via an inexpensive type A connector and cable.
摘要翻译：在使用符合高分辨率多媒体接口（HDMI）标准的数字接口的多个信道的视频信号的传输中，提供了传输最小化差分信号（TMDS）混合电路和TMDS分离电路，以执行时分以高于视频信号的传输速率的频率传输多个信道的视频信号的TMDS数据。因此，通过廉价的A型连接器和电缆来传输多个通道的视频信号。

5. 发明授权

US07127530B2 Command issuing apparatus for high-speed serial interface 有权
公开(公告)号：US07127530B2
公开(公告)日：2006-10-24
申请号：US10124265
申请日：2002-04-18
申请人： Isamu Ishimura , Yoshihiro Tabira
发明人： Isamu Ishimura , Yoshihiro Tabira
IPC分类号： G06F13/38 , G06F13/00 , G06F3/00
CPC分类号： G06F13/126
摘要： In order to reduce load placed on a CPU (central processing unit) in providing SBP-2 (serial bus protocol 2) initiator capability, provided are a sequence control circuit activated by the CPU for controlling a command issue sequence, a packet processing circuit for assembling operation request blocks (ORB) into a transmission packet and extracting a status from a received packet; buffer for storing a command ORB provided by the CPU; a buffer for storing a management ORB provided by the CPU; a buffer for storing a status received for an issued management ORB and providing the status to the CPU; and a buffer for command for storing a status received for an issued command ORB and providing the status to the CPU.

6. 发明授权

US06654380B1 Data exchange unit 有权
标题翻译：数据交换单元
公开(公告)号：US06654380B1
公开(公告)日：2003-11-25
申请号：US09497194
申请日：2000-02-03
申请人： Takashi Yumiba , Yoshihiro Tabira , Hirotaka Itoh , Isamu Ishimura
发明人： Takashi Yumiba , Yoshihiro Tabira , Hirotaka Itoh , Isamu Ishimura
IPC分类号： H04L2900
CPC分类号： H04L49/90 , H04L69/22
摘要： Reception buffer, transmission buffer, transmission-reception buffer, reception filter and transmission filter are provided. The reception filter determines where a received packet should be stored based on the contents of the received packet. Specifically, in executing a READ command, a response packet, which is returned in response to a data transmission packet, is detected by the reception filter. Received packets of the other types are stored on the reception buffer. In executing a WRITE command, a data request packet is transmitted from the transmission buffer. A data reception packet responding to the data request packet is stored by the reception filter on the transmission-reception buffer. Received packets of the other types are stored on the reception buffer. The capacity of the transmission-reception buffer is twice as large as the size of a maximum transferable packet. Thus, overhead can be reduced and yet data can be transferred at higher speeds.
摘要翻译：提供接收缓冲器，发送缓冲器，发送接收缓冲器，接收滤波器和发送滤波器。接收过滤器基于接收到的分组的内容来确定应该存储接收分组的位置。具体地，在执行READ命令时，接收过滤器检测响应于数据传输分组返回的响应分组。接收到的其他类型的数据包被存储在接收缓冲器中。在执行WRITE命令时，从发送缓冲器发送数据请求分组。响应于数据请求分组的数据接收分组由接收滤波器存储在发送接收缓冲器上。接收到的其他类型的数据包被存储在接收缓冲器中。发送接收缓冲器的容量是最大可传输分组的大小的两倍。因此，可以降低开销，并且可以以更高的速度传输数据。

7. 发明授权

US08040433B2 Video output apparatus, control method thereof, and video device 有权
标题翻译：视频输出装置，其控制方法和视频装置
公开(公告)号：US08040433B2
公开(公告)日：2011-10-18
申请号：US11678889
申请日：2007-02-26
申请人： Takayuki Matsui , Isamu Ishimura
发明人： Takayuki Matsui , Isamu Ishimura
IPC分类号： H04N7/01 , H04N11/06 , H04N5/14 , H04N5/268 , H04N9/64
CPC分类号： H04N5/46 , H04N9/642 , H04N21/43635
摘要： A video output apparatus includes a video output unit which outputs a video signal while switching the format of the video signal between a first format and a second format for expressing color differently. The video output apparatus also includes a mute signal generation unit which generates, as a muting video signal, a specialized video signal expressing a color in which the difference between the color displayed when the specialized video signal is interpreted in its own format and the color displayed when the specialized video signal is interpreted in a different format is a minimum. The video output apparatus further includes a selection unit, which selects one of the video signal outputted by said video output unit and the mute signal generated by said mute signal generation unit and outputs the selected signal, and a control unit, which causes the selection unit to select the mute signal in a period including the switch performed by the video output unit.
摘要翻译：视频输出装置包括视频输出单元，其在切换第一格式和第二格式之间的视频信号的格式的同时输出视频信号，以表示不同的颜色。该视频输出装置还包括静音信号产生单元，该静音信号产生单元产生一个专用视频信号，该专用视频信号表示当专用视频信号以其自己的格式被解释时显示的颜色和显示的颜色之间的差异当专用视频信号以不同的格式被解释是最小的。视频输出装置还包括选择单元，其选择由所述视频输出单元输出的视频信号中的一个和由所述静音信号产生单元产生的静音信号并输出所选择的信号;以及控制单元，其使所述选择单元在包括由视频输出单元执行的开关的周期中选择静音信号。

8. 发明申请

US20120033048A1 3D IMAGE DISPLAY APPARATUS, 3D IMAGE PLAYBACK APPARATUS, AND 3D IMAGE VIEWING SYSTEM 审中-公开
标题翻译： 3D图像显示设备，3D图像播放设备和3D图像浏览系统
公开(公告)号：US20120033048A1
公开(公告)日：2012-02-09
申请号：US13277015
申请日：2011-10-19
申请人： Suguru OGAWA , Isamu Ishimura
发明人： Suguru OGAWA , Isamu Ishimura
IPC分类号： H04N13/02 , H04N13/04
CPC分类号： H04N19/597 , H04N13/243 , H04N13/341 , H04N13/378 , H04N13/398
摘要： A 3D image display apparatus comprises a transmission-reception device and a control signal output device. The transmission-reception device receives a video data including a plurality of image informations which is base data of 3D images from a 3D image playback apparatus through a transmission cable and thereby generates an image signal. The control signal output device transmits a control signal for controlling light penetration states of penetration units for right and left eyes to shutter glasses. The transmission-reception device receives the video data from the 3D image playback apparatus through the transmission cable and thereby generates the image signal and a synchronizing signal. The synchronizing signal indicates which of the plurality of image informations is included in the image signal currently outputted. The control signal output device generates the control signal based on the synchronizing signal.
摘要翻译： 3D图像显示装置包括发送接收装置和控制信号输出装置。发送接收装置通过传输电缆从3D图像重放装置接收包括作为3D图像的基础数据的多个图像信息的视频数据，从而生成图像信号。控制信号输出装置发送用于控制右眼和左眼的穿透单元的透光状态的控制信号到快门眼镜。发送接收装置通过传输电缆从3D图像再现装置接收视频数据，从而生成图像信号和同步信号。同步信号指示多个图像信息中的哪一个被包括在当前输出的图像信号中。控制信号输出装置根据同步信号生成控制信号。

9. 发明申请

US20060023739A1 IEEE1394 connection apparatus 审中-公开
标题翻译： IEEE1394连接装置
公开(公告)号：US20060023739A1
公开(公告)日：2006-02-02
申请号：US11189887
申请日：2005-07-27
申请人： Isamu Ishimura
发明人： Isamu Ishimura
IPC分类号： H04L12/66
CPC分类号： H04L12/40078 , H04L12/6418
摘要： On a commercial product mounting substrate 100, an IEEE1394 controller LSI 101 and CPU 103 which controls the IEEE1394 controller LSI 101 are mounted. A built-in PHY 102 having two ports is mounted on the IEEE1394 controller LSI 101. In addition, an external PHY 105 having three ports is also mounted on the commercial product mounting substrate 100. One port of the built-in PHY 102 and one port of the external PHY 105 are connected with each other by wiring on the commercial product mounting substrate 100. Remaining one port of the built-in PHY 102 and remaining two ports of the external PHY 105 are connected to connectors A, B and C, respectively, by wiring on the commercial product mounting substrate 100, and as a result, the number of connectors of a commercial product becomes three.
摘要翻译：在商品安装基板100上安装有控制IEEE1394控制器LSI101的IEEE1394控制器LSI101和CPU103。具有两个端口的内置PHY102安装在IEEE1394控制器LSI101上。此外，具有三个端口的外部PHY 105也安装在商品安装基板100上。内置PHY102的一个端口和外部PHY 105的一个端口通过商业产品安装基板100上的布线相互连接。剩余的内置PHY 102的一个端口和外部PHY 105的剩余两个端口分别通过商业产品安装基板100上的布线连接到连接器A，B和C，结果，连接器的数量的商品成三。

10. 发明授权

US06915359B2 Data transfer device, data transfer method, data transfer program and computer readable storage medium thereof 有权
标题翻译：数据传输装置，数据传输方法，数据传输程序及其计算机可读存储介质
公开(公告)号：US06915359B2
公开(公告)日：2005-07-05
申请号：US09989302
申请日：2001-11-21
申请人： Youichi Yamamoto , Yoshihiro Tabira , Isamu Ishimura
发明人： Youichi Yamamoto , Yoshihiro Tabira , Isamu Ishimura
IPC分类号： G06F13/42 , G06F13/00 , G06F3/00
CPC分类号： G06F13/426
摘要： A data transfer device which set an address of page as transfer destination and transfer data to the page. In the data transfer device to which the present invention is applied, an address and page length of a page are acquired on the basis of an address of a page table specified by a read command. Then, transfer information including the address of transfer source, transfer data length and address of transfer destination of data is set according to page element of page as transfer destination page. Then, it is judged whether the transfer destination page and other page form a continuous area. And if it is judged that the continuous area is formed, transfer information will be changed. Data transfer is effected on the basis of changed transfer information. That reduces the need to set the other area at the transfer destination and thus the transfer efficiency improves.
摘要翻译：数据传送装置，其将页面的地址设置为传送目的地并将数据传送到页面。在应用本发明的数据传送装置中，基于由读取指令指定的页面表的地址来获取页面的地址和页面长度。然后，根据页面页面作为传送目的地页面，设置包括传送源地址，传送数据长度和数据传送目的地地址的传送信息。然后，判断转印目的地页面和其他页面是否形成连续区域。并且如果判断出连续区域形成，则传送信息将被改变。数据传输是根据改变的传输信息进行的。这减少了在传送目的地设置其他区域的需要，从而提高了传输效率。

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