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    • 1. 发明申请
    • DETECTION SCHEME FOR FOUR WIRE PAIR POWER OVER ETHERNET SYSTEM
    • 四线电源以太网系统的检测方案
    • US20150215131A1
    • 2015-07-30
    • US14607608
    • 2015-01-28
    • Linear Technology Corporation
    • Michael PaulJeffrey HeathDavid DwelleyHeath Stewart
    • H04L12/10G06F1/26
    • H04L12/10G06F1/26
    • In a method performed by a PoE system, a PSE is able to detect whether a PD is compatible for receiving power via four wire pairs in the standard Ethernet cable. The PSE provides a current limited voltage to a first and second pair of wires in the cable, during a detection phase, to detect a characteristic impedance of the PD. In the PSE, a first resistor is connected to a third wire pair and a second resistor is connected to a fourth wire pair. During the detection phase, the PSE detects the relative currents through the resistors. If the currents are the same, then the PSE knows the PD is able to receive power via the four wire pairs. The PSE then applies the full PoE voltage to the first and second wire pairs and connects the third and fourth wire pairs to a low voltage via a MOSFET.
    • 在PoE系统执行的方法中,PSE能够通过标准以太网电缆中的四线对来检测PD是否兼容接收电力。 PSE在检测阶段向电缆中的第一和第二对导线提供电流限制电压,以检测PD的特性阻抗。 在PSE中,第一电阻器连接到第三线对,并且第二电阻器连接到第四线对。 在检测阶段,PSE检测通过电阻的相对电流。 如果电流相同,则PSE知道PD能够通过四条线对接收电力。 PSE然后将全PoE电压施加到第一和第二线对,并且通过MOSFET将第三和第四线对连接到低电压。
    • 8. 发明申请
    • SYSTEM WITH SLEEP AND WAKE UP CONTROL OVER DC PATH
    • 系统具有休眠和唤醒控制超直流路径
    • US20160337138A1
    • 2016-11-17
    • US15134117
    • 2016-04-20
    • Linear Technology Corporation
    • Andrew J. GardnerDavid M. DwelleyHeath Stewart
    • H04L12/10
    • H04L12/10H04L12/12H04L12/403Y02D50/40
    • A system includes a master and a slave coupled via a wire pair for transmitting differential data. The master and slave are each powered by a local DC power supply. In a normal mode, a DC voltage and differential data are supplied over the same wire pair. The differential data is processed by a PHY AC-coupled to the wire pair. To enter a low power sleep mode, such as due to a temporary non-use of the system, the master interrupts the DC voltage on the wire pair, which signals to the slave to enter the sleep mode. The system is woken up by reapplying the DC voltage to the wire pair to signal to the slave to wake up. Only the DC path, and not the data path, is used for signaling the sleep mode and awake mode, so the data path can be disabled to conserve power.
    • 系统包括通过线对耦合的主机和从机,用于发送差分数据。 主机和从机都由本地直流电源供电。 在正常模式下,通过相同的线对提供直流电压和差分数据。 差分数据由耦合到线对的PHY处理。 要进入低功耗睡眠模式,例如由于暂时不使用系统,主机会中断线对上的直流电压,从而将信号通知从机进入睡眠模式。 通过将直流电压重新应用到线对来唤醒系统,以向从机发信号进行唤醒。 只有DC路径,而不是数据路径用于信令睡眠模式和唤醒模式,因此可以禁用数据路径以节省功耗。