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1. 发明申请

US20180278525A1 Field Checking Based Caching of ACL Lookups to Ease ACL Lookup Search 审中-公开
公开(公告)号：US20180278525A1
公开(公告)日：2018-09-27
申请号：US15469530
申请日：2017-03-26
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli , Aviv Kfir
IPC分类号： H04L12/741 , H04L29/08
CPC分类号： H04L45/7453 , H04L45/7457 , H04L45/748
摘要： In a network element cache operation is enhanced by extracting a set of fields from a packet, constructing a hash key from the extracted fields, and identifying a subset of the fields, wherein the field values thereof fail to exist in a set of classification rules. The hash key by is modified by masking the subset of the extracted fields. A hash lookup is performed using the modified hash key in a cache memory that stores a portion of the classification rules. The packet is processed responsively to the lookup.

2. 发明授权

US10068034B2 Efficient matching of TCAM rules using hash tables in RAM 有权
公开(公告)号：US10068034B2
公开(公告)日：2018-09-04
申请号：US15257957
申请日：2016-09-07
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli
IPC分类号： G06F17/30 , H04L12/743 , H04L29/06 , G11C7/10
摘要： A method includes extracting classification keys from a collection of data items. A corpus of rules for matching to the classification keys is received, each rule including a respective set of unmasked bits having corresponding bit values, and at least some of the rules also include masked bits. Rule patterns are extracted from the corpus, each rule pattern defining a respective sequence of masked and unmasked bits to which one or more of the rules conforms. Multiple hash tables are defined in a RAM, each is used for searching for a rule that matches a given classification key. A match result of a given rule in a given hash table is also indicative of which of the other hash tables are to be used for subsequent searching. The data items are classified by matching the respective classification keys to the rules using one or more of the hash tables.

3. 发明申请

US20170366502A1 IP Route Caching with Two Search Stages on Prefix Length 审中-公开
公开(公告)号：US20170366502A1
公开(公告)日：2017-12-21
申请号：US15186477
申请日：2016-06-19
申请人： Mellanox Technologies TLV Ltd.
发明人： Fima Kravchik , Pedro Reviriego , Salvatore Pontarelli , Aviv Kfir , Amir Roitshtein , Gil Levy
IPC分类号： H04L29/12 , H04L29/08 , H04L12/741
CPC分类号： H04L61/6009 , H04L45/54 , H04L45/74 , H04L45/7453 , H04L67/2842
摘要： A data packet is received in a network element. The network element has a cache memory in which cache entries represent a portion of addresses stored in a main memory, The destination address and the cache entries each comprise a binary number. A first determination is made that a number M of the most significant bits of a cache entry and the destination address are identical. A second determination is made that an additional number M+L of the most significant bits of a cache entry and the destination address are identical. Routing information is then retrieved the cache memory, and the packet processed according to the routing information.

4. 发明申请

US20170053012A1 HIGH-PERFORMANCE BLOOM FILTER ARRAY 审中-公开
标题翻译：高性能BLOOM过滤器阵列
公开(公告)号：US20170053012A1
公开(公告)日：2017-02-23
申请号：US14827402
申请日：2015-08-17
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli , Efim Yehiel Kravchik
IPC分类号： G06F17/30 , G06N5/02
CPC分类号： G06F16/285 , G06F16/90335 , G06N5/04 , H04L45/7453 , H04L45/7457 , H04L49/3063
摘要： A method for classification includes extracting respective classification keys from a collection of data items and defining a set of patterns for matching to the classification keys. A plurality of memory banks contain respective Bloom filters, each Bloom configured to indicate one or more patterns in the set that are candidates to match a given classification key. A respective first hash function is applied to the classification keys for each pattern in order to select, for each classification key, one of the Bloom filters to query for the pattern. The selected Bloom filters are queried by applying a respective second hash function to each classification key, so as to receive from the Bloom filters an indication of the one or more candidate patterns. The data items are classified by matching the respective classification keys against the candidate patterns.
摘要翻译：一种用于分类的方法包括从数据项集合中提取相应的分类密钥，并且定义用于匹配分类关键字的一组模式。多个存储体包含相应的Bloom过滤器，每个Bloom被配置为指示集合中的一个或多个模式，其是与给定分类密钥相匹配的候选。相应的第一散列函数被应用于每个模式的分类密钥，以便为每个分类密钥选择布隆过滤器之一来查询模式。通过对每个分类密钥应用相应的第二散列函数来查询所选择的Bloom过滤器，以便从Bloom接收过滤器中的一个或多个候选模式的指示。通过将各个分类键与候选模式进行匹配来对数据项进行分类。

5. 发明授权

US11502912B2 Cache memory management using fingerprints 有权
公开(公告)号：US11502912B2
公开(公告)日：2022-11-15
申请号：US17137729
申请日：2020-12-30
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli
IPC分类号： H04L41/12 , H04L41/14 , H04L1/00 , H04L69/22 , H03M13/03 , H04L49/00 , H04L67/5682
摘要： A network device includes at least one communication ingress port, ingress packet processing circuitry and a packet-action cache memory (PACM). The at least one communication ingress port is configured to receive packets including packet headers from a network. The ingress packet processing circuitry is configured to receive the packets and to process the packets in accordance with respective packet actions specified for the packets. The PACM is configured to store one or more of the packet actions in association with one or more respective fingerprints which are calculated over the packet headers of the corresponding packets, for use by the ingress packet processing circuitry. The fingerprints are smaller than the corresponding packet headers.

6. 发明授权

US11327974B2 Field variability based TCAM splitting 有权
公开(公告)号：US11327974B2
公开(公告)日：2022-05-10
申请号：US16052646
申请日：2018-08-02
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Gil Levy , Aviv Kfir , Salvatore Pontarelli , Pedro Reviriego , Matty Kadosh
IPC分类号： G06F16/2455 , G06F16/28
摘要： A collection of rules comprising fields that may have wildcard values. The method includes defining first and second subsets of the fields, the second subset being exclusive of the first subset. Intersections of overlapping fields of the first subset are added to the first subset to form an augmented first subset. Metadata from the augmented first subset and the fields not selected for the first subset are combined to define second parts of the rules. Data items are classified by matching a search key to one of the first parts and one of the second parts of the rules.

7. 发明申请

US20190294549A1 Hash Table-Based Mask Length Computation for Longest Prefix Match Caching 审中-公开
公开(公告)号：US20190294549A1
公开(公告)日：2019-09-26
申请号：US15925815
申请日：2018-03-20
申请人： MELLANOX TECHNOLOGIES TLV LTD.
发明人： Gil Levy , Aviv Kfir , Salvatore Pontarelli , Pedro Reviriego
IPC分类号： G06F12/0864 , H04L12/747 , H04L12/745 , H04L12/743
摘要： A data packet is received in a network element. The network element has a cache memory in which cache entries represent a portion of addresses stored in a main memory, The destination address and the cache entries each comprise a binary number. A hash function is applied to the masked destination address to access a hash table. When the number of most significant bits corresponding to the value in the hash table in one of the cache entries and in the destination address are identical, routing information for the packet is retrieved from the cache entry.

8. 发明申请

US20170068669A1 CUCKOO HASHING WITH SELECTABLE HASH 审中-公开
公开(公告)号：US20170068669A1
公开(公告)日：2017-03-09
申请号：US14846777
申请日：2015-09-06
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli
IPC分类号： G06F17/30
CPC分类号： G06F17/3033 , H04L45/7453
摘要： Decision apparatus includes a first memory bank, containing a first table of hash composition factors, and a second memory bank, containing second and third tables of associative entries. A logic pipeline receives a sequence of data items and extracts a search key from each data item. A pre-hash circuit computes a first index by applying a first hash function to the search key. A first lookup circuit reads a hash composition factor from a location in the first memory bank indicated by the first index, and a hash circuit compute second and third indices as different combinations, determined by the hash composition factor, of second and third hash functions applied by the hash circuit to the search key. A second lookup circuit reads the entries in the second and third tables that are indicated respectively by the second and third indices.
摘要翻译：决策装置包括第一存储体，其包含散列组合因子的第一表和包含第二和第三表的关联项的第二存储体。逻辑流水线接收数据项序列，并从每个数据项提取搜索关键字。预散列电路通过对搜索关键字应用第一散列函数来计算第一索引。第一查找电路从由第一索引指示的第一存储体中的位置读取散列构成因子，并且散列电路计算第二和第三索引作为由哈希构成因子确定的应用的第二和第三散列函数应用的不同组合通过哈希电路到搜索键。第二查找电路读取由第二和第三索引分别指示的第二和第三表中的条目。

9. 发明授权

US10476794B2 Efficient caching of TCAM rules in RAM 有权
公开(公告)号：US10476794B2
公开(公告)日：2019-11-12
申请号：US15663758
申请日：2017-07-30
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Aviv Kfir , Salvatore Pontarelli
IPC分类号： H04L12/747 , G06F12/0868 , H04L12/743 , H04L29/06 , H04L29/08
摘要： Communication apparatus includes a TCAM, which stores a corpus of rules, including respective sets of unmasked and masked bits. The rules conform to respective rule patterns, each defining a different, respective sequence of masked and unmasked bits to which one or more of the rules conform. A RAM caches rule entries corresponding to rules belonging to one or more of the rule patterns that have been selected for caching. Decision logic extracts respective classification keys from data packets, each key including a string of bits extracted from selected fields in a given data packet, and classifies the data packets by first matching the respective classification keys to the cached rule entries in the RAM and, when no match is found in the RAM, by matching the respective classification keys to the rules in the TCAM.

10. 发明授权

US10049126B2 Cuckoo hashing with selectable hash 有权
公开(公告)号：US10049126B2
公开(公告)日：2018-08-14
申请号：US14846777
申请日：2015-09-06
申请人： Mellanox Technologies TLV Ltd.
发明人： Gil Levy , Pedro Reviriego , Salvatore Pontarelli
IPC分类号： G06F17/30 , H04L12/743
摘要： Decision apparatus includes a first memory bank, containing a first table of hash composition factors, and a second memory bank, containing second and third tables of associative entries. A logic pipeline receives a sequence of data items and extracts a search key from each data item. A pre-hash circuit computes a first index by applying a first hash function to the search key. A first lookup circuit reads a hash composition factor from a location in the first memory bank indicated by the first index, and a hash circuit compute second and third indices as different combinations, determined by the hash composition factor, of second and third hash functions applied by the hash circuit to the search key. A second lookup circuit reads the entries in the second and third tables that are indicated respectively by the second and third indices.

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