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1. 发明申请

US20200152620A1 SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY 审中-公开
公开(公告)号：US20200152620A1
公开(公告)日：2020-05-14
申请号：US16743451
申请日：2020-01-15
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L23/60 , H01L23/00 , H01L25/00 , H01L25/065
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

2. 发明申请

US20190148359A1 SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY 审中-公开
公开(公告)号：US20190148359A1
公开(公告)日：2019-05-16
申请号：US16201811
申请日：2018-11-27
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L25/00 , H01L25/065 , H01L23/00 , H01L27/115 , H01L49/02
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

3. 发明申请

US20190148314A1 SEMICONDUCTOR DEVICES WITH POST-PROBE CONFIGURABILITY 审中-公开
公开(公告)号：US20190148314A1
公开(公告)日：2019-05-16
申请号：US16138003
申请日：2018-09-21
申请人： Micron Technology, Inc.
发明人： James E. Davis , Kevin G. Duesman , Jeffrey P. Wright , Warren L. Boyer
IPC分类号： H01L23/60 , H01L23/538 , H01L23/00 , H01L25/04
CPC分类号： H01L23/60 , G11C5/02 , G11C5/025 , H01L23/538 , H01L24/02 , H01L24/10 , H01L24/95 , H01L25/043 , H01L25/0657 , H01L2224/05554 , H01L2224/48091 , H01L2224/48145 , H01L2224/48147 , H01L2224/48227 , H01L2224/49175 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2225/06562 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2224/45099
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements, and a plated pad electrically coupling at least a part of the first contact pad to at least a part of the second contact pad. The substrate includes a substrate contact electrically coupled to the plated pad on the die.

4. 发明申请

US20200144182A1 SEMICONDUCTOR DEVICES HAVING 3-DIMENSIONAL INDUCTIVE STRUCTURES 审中-公开
公开(公告)号：US20200144182A1
公开(公告)日：2020-05-07
申请号：US16183057
申请日：2018-11-07
申请人： Micron Technology, Inc.
发明人： James E. Davis , Kevin G. Duesman
IPC分类号： H01L23/522 , H01L23/528 , H01L23/532
摘要： Semiconductor devices having inductive structures, and associated systems and methods, are disclosed herein. In one embodiment, a semiconductor device includes a substrate and at least one circuit component coupled to the substrate. The semiconductor device can further include an inductive structure carried by the substrate and having a stack of alternating first and second layers. In some embodiments, the first layers comprise an oxide material and the second layers each include a coil of conductive material. The coils of conductive material can be electrically coupled (a) together to form an inductor and (b) to the at least one circuit component.

5. 发明申请

US20190273052A1 SEMICONDUCTOR DEVICES WITH POST-PROBE CONFIGURABILITY 审中-公开
公开(公告)号：US20190273052A1
公开(公告)日：2019-09-05
申请号：US16416210
申请日：2019-05-18
申请人： Micron Technology, Inc.
发明人： James E. Davis , Kevin G. Duesman , Jeffrey P. Wright , Warren L. Boyer
IPC分类号： H01L23/60 , H01L23/00 , H01L23/538 , H01L25/04
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements, and a plated pad electrically coupling at least a part of the first contact pad to at least a part of the second contact pad. The substrate includes a substrate contact electrically coupled to the plated pad on the die.

6. 发明授权

US10312232B1 Semiconductor devices with package-level configurability 有权
公开(公告)号：US10312232B1
公开(公告)日：2019-06-04
申请号：US16007903
申请日：2018-06-13
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L23/00 , H01L25/00 , H01L25/065 , H01L27/115 , H01L49/02
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

7. 发明申请

US20190148358A1 SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY 审中-公开
公开(公告)号：US20190148358A1
公开(公告)日：2019-05-16
申请号：US16007903
申请日：2018-06-13
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L23/00 , H01L25/065 , H01L25/00 , H01L49/02 , H01L27/115
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

8. 发明授权

US10128229B1 Semiconductor devices with package-level configurability 有权
公开(公告)号：US10128229B1
公开(公告)日：2018-11-13
申请号：US15811572
申请日：2017-11-13
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L25/065 , H01L25/00 , H01L23/00 , H01L49/02 , H01L27/115
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

9. 发明申请

US20130062678A1 Recessed Access Device for a Memory 有权
标题翻译：嵌入式存储设备
公开(公告)号：US20130062678A1
公开(公告)日：2013-03-14
申请号：US13674159
申请日：2012-11-12
申请人： Micron Technology, Inc.
发明人： Kurt D. Beigel , Jigish D. Trivedi , Kevin G. Duesman
IPC分类号： H01L27/108 , H01L29/78
CPC分类号： H01L29/66621 , H01L27/10876
摘要： Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate oxide layer in the recess. The device recess may be extended to a second depth that is greater that the first depth to form an extended portion of the device recess. A field oxide layer may be provided within an interior of the device recess that extends inwardly into the interior of the device recess and into the substrate. Active regions may be formed in the substrate that abut the field oxide layer, and a gate material may be deposited into the device recess.
摘要翻译：公开了具有凹入式存取装置的半导体存储器件。在一些实施例中，形成凹陷进入装置的方法包括在衬底材料中形成器件凹部，该衬底材料延伸到衬底中的第一深度，该第一深度包括凹陷中的栅极氧化物层。装置凹部可以延伸到大于第一深度的第二深度，以形成装置凹部的延伸部分。场氧化物层可以设置在器件凹部的内部，其内部延伸到器件凹部的内部并进入衬底。活性区域可以形成在衬底中，其邻接场氧化物层，并且栅极材料可以沉积到器件凹部中。

10. 发明申请

US20210175228A1 SEMICONDUCTOR DEVICES WITH PACKAGE-LEVEL CONFIGURABILITY 有权
公开(公告)号：US20210175228A1
公开(公告)日：2021-06-10
申请号：US17178771
申请日：2021-02-18
申请人： Micron Technology, Inc.
发明人： James E. Davis , John B. Pusey , Zhiping Yin , Kevin G. Duesman
IPC分类号： H01L27/02 , H01L23/00 , H01L23/60 , H01L25/00 , H01L25/065 , H01L49/02 , H01L27/115
摘要： A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.

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