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1. 发明授权

US09910700B2 Migration between CPU cores 有权
公开(公告)号：US09910700B2
公开(公告)日：2018-03-06
申请号：US14836331
申请日：2015-08-26
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/455 , G06F9/48 , G06F9/50 , G06F13/24
CPC分类号： G06F9/4812 , G06F9/4856 , G06F9/5088 , G06F13/24
摘要： A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.

2. 发明申请

US20220075649A1 MIGRATION BETWEEN CPU CORES 有权
公开(公告)号：US20220075649A1
公开(公告)日：2022-03-10
申请号：US17530681
申请日：2021-11-19
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/48 , G06F9/50 , G06F15/16
摘要： Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.

3. 发明申请

US20180165120A1 MIGRATION BETWEEN CPU CORES 审中-公开
公开(公告)号：US20180165120A1
公开(公告)日：2018-06-14
申请号：US15890481
申请日：2018-02-07
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/48 , G06F15/16 , G06F9/50
CPC分类号： G06F9/4856 , G06F9/4812 , G06F9/505 , G06F9/5061 , G06F9/5083 , G06F15/16 , G06F2209/482
摘要： Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.

4. 发明申请

US20170060624A1 Migration Between CPU Cores 有权
标题翻译： CPU内核之间的迁移
公开(公告)号：US20170060624A1
公开(公告)日：2017-03-02
申请号：US14836331
申请日：2015-08-26
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/48 , G06F13/24 , G06F9/50
CPC分类号： G06F9/4812 , G06F9/4856 , G06F9/5088 , G06F13/24
摘要： A method for migration of operations between CPU cores, the method includes: processing, by a source core, one or more tasks and one or more interrupt service routines; accessing a mapping corresponding to a task of the one or more tasks and an interrupt service routine of the one or more interrupt service routines; identifying, based on the mapping, a target core that corresponds to the task and the interrupt service routine; blocking the task from being processed by the source core in response to identifying the target core; in response to identifying the target core, disabling an interrupt corresponding to the interrupt service routine; in response to identifying the target core, assigning the task and the interrupt to the target core; after assigning the interrupt to the target core, enabling the interrupt; and after assigning the task to the target core, processing the task by the target core.
摘要翻译：一种用于在CPU核心之间迁移操作的方法，所述方法包括：由源核心处理一个或多个任务和一个或多个中断服务例程; 访问对应于所述一个或多个任务的任务的映射和所述一个或多个中断服务例程的中断服务程序; 基于所述映射来识别与所述任务和所述中断服务程序相对应的目标核心; 响应于识别目标核心，阻止任务被源核心处理; 响应于识别目标核心，禁用与中断服务程序相对应的中断; 响应于识别目标核心，将任务和中断分配给目标核心; 在将中断分配给目标内核后，启用中断; 并且在将任务分配给目标核心之后，由目标核心处理该任务。

5. 发明授权

US09304937B2 Atomic write operations for storage devices 有权
标题翻译：存储设备的原子写入操作
公开(公告)号：US09304937B2
公开(公告)日：2016-04-05
申请号：US14163913
申请日：2014-01-24
申请人： NetApp, Inc.
发明人： Greg William Achilles , Gordon Hulpieu , Donald Roman Humlicek , Martin Oree Parrish , Kent Prosch , Alan Stewart
IPC分类号： G06F12/08 , G06F11/14
CPC分类号： G06F12/0891 , G06F11/1471 , G06F12/0815 , G06F12/0873
摘要： Atomic write operations for storage devices are implemented by maintaining the data that would be overwritten in the cache until the write operation completes. After the write operation completes, including generating any related metadata, a checkpoint is created. After the checkpoint is created, the old data is discarded and the new data becomes the current data for the affected storage locations. If an interruption occurs prior to the creation of the checkpoint, the old data is recovered and any new is discarded. If an interruption occurs after the creation of the checkpoint, any remaining old data is discarded and the new data becomes the current data. Write logs that indicate the locations affected by in progress write operation are used in some implementations. If neither all of the new data nor all of the old data is recoverable, a predetermined pattern can be written into the affected locations.
摘要翻译：存储设备的原子写入操作通过维护在缓存中被覆盖的数据直到写入操作完成来实现。写操作完成后，包括生成任何相关的元数据，将创建一个检查点。创建检查点后，旧数据将被丢弃，新数据将成为受影响存储位置的当前数据。如果在创建检查点之前发生中断，则恢复旧数据，并丢弃任何新数据。如果在创建检查点后发生中断，则丢弃任何剩余的旧数据，并将新数据变为当前数据。在一些实现中使用写入指示在进行中写入操作影响的位置的日志。如果既不能全部新数据也不能恢复旧数据，则可以将预定模式写入受影响的位置。

6. 发明授权

US11182202B2 Migration between CPU cores 有权
公开(公告)号：US11182202B2
公开(公告)日：2021-11-23
申请号：US16653079
申请日：2019-10-15
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50 , G06F15/16
摘要： Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.

7. 发明申请

US20200042347A1 Migration Between CPU Cores 审中-公开
公开(公告)号：US20200042347A1
公开(公告)日：2020-02-06
申请号：US16653079
申请日：2019-10-15
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/48 , G06F9/50 , G06F15/16
摘要： Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.

8. 发明授权

US10459759B2 Migration between CPU cores 有权
公开(公告)号：US10459759B2
公开(公告)日：2019-10-29
申请号：US15890481
申请日：2018-02-07
申请人： NetApp, Inc.
发明人： Kent Prosch , Matthew Weber , Arindam Banerjee , Ben McDavitt
IPC分类号： G06F9/46 , G06F9/48 , G06F9/50 , G06F15/16
摘要： Methods, non-transitory machine-readable media, and computing devices for transitioning tasks and interrupt service routines are provided. An example method includes processing, by a plurality of processor cores of a storage controller, tasks and interrupt service routines. A performance statistic is determined corresponding to the plurality of processor cores. Based on detecting that the performance statistic passes a threshold, a number of the plurality of processor cores that are assigned to the tasks and the interrupt service routines are reduced.

9. 发明申请

US20150113224A1 ATOMIC WRITE OPERATIONS FOR STORAGE DEVICES 有权
标题翻译：存储设备的原子写操作
公开(公告)号：US20150113224A1
公开(公告)日：2015-04-23
申请号：US14163913
申请日：2014-01-24
申请人： NetApp, Inc.
发明人： Greg William Achilles , Gordon Hulpieu , Donald Roman Humlicek , Martin Oree Parrish , Kent Prosch , Alan Stewart
IPC分类号： G06F12/08
CPC分类号： G06F12/0891 , G06F11/1471 , G06F12/0815 , G06F12/0873
摘要： Atomic write operations for storage devices are implemented by maintaining the data that would be overwritten in the cache until the write operation completes. After the write operation completes, including generating any related metadata, a checkpoint is created. After the checkpoint is created, the old data is discarded and the new data becomes the current data for the affected storage locations. If an interruption occurs prior to the creation of the checkpoint, the old data is recovered and any new is discarded. If an interruption occurs after the creation of the checkpoint, any remaining old data is discarded and the new data becomes the current data. Write logs that indicate the locations affected by in progress write operation are used in some implementations. If neither all of the new data nor all of the old data is recoverable, a predetermined pattern can be written into the affected locations.
摘要翻译：存储设备的原子写入操作通过维护在缓存中被覆盖的数据直到写入操作完成来实现。写操作完成后，包括生成任何相关的元数据，将创建一个检查点。创建检查点后，旧数据将被丢弃，新数据将成为受影响存储位置的当前数据。如果在创建检查点之前发生中断，则恢复旧数据，并丢弃任何新数据。如果在创建检查点后发生中断，则丢弃任何剩余的旧数据，并将新数据变为当前数据。在一些实现中使用写入指示在进行中写入操作影响的位置的日志。如果既不能全部新数据也不能恢复旧数据，则可以将预定模式写入受影响的位置。

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