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1. 发明授权

US09105506B2 Dynamic memory structure 有权
标题翻译：动态内存结构
公开(公告)号：US09105506B2
公开(公告)日：2015-08-11
申请号：US13527604
申请日：2012-06-20
申请人： Nicky Lu , Ming-Hong Kuo
发明人： Nicky Lu , Ming-Hong Kuo
IPC分类号： H01L27/108 , H01L49/02 , H01L29/78
CPC分类号： H01L27/10808 , H01L27/10826 , H01L27/1085 , H01L27/10879 , H01L28/60 , H01L29/42376 , H01L29/42392 , H01L29/785
摘要： A dynamic memory structure includes a strip semiconductor material disposed on a substrate, a gate standing astride the strip semiconductor material and dividing the strip semiconductor material into a source terminal, a drain terminal and a channel region wherein a source width of the source terminal is larger than or equal to a channel width, a dielectric layer sandwiched between the gate and the strip semiconductor material, and a capacitor unit disposed on the substrate and including the source terminal serving as a lower electrode.
摘要翻译：动态存储器结构包括设置在衬底上的带状半导体材料，跨越条状半导体材料的栅极，并将带状半导体材料分成源极端子，漏极端子和沟道区域，其中源极端子的源极宽度较大夹在栅极和带状半导体材料之间的电介质层，以及设置在基板上并包括用作下部电极的源极端子的电容器单元。

2. 发明申请

US20120326219A1 DYNAMIC MEMORY STRUCTURE 有权
标题翻译：动态记忆结构
公开(公告)号：US20120326219A1
公开(公告)日：2012-12-27
申请号：US13527604
申请日：2012-06-20
申请人： Nicky Lu , Ming-Hong Kuo
发明人： Nicky Lu , Ming-Hong Kuo
IPC分类号： H01L27/108
CPC分类号： H01L27/10808 , H01L27/10826 , H01L27/1085 , H01L27/10879 , H01L28/60 , H01L29/42376 , H01L29/42392 , H01L29/785
摘要： A dynamic memory structure includes a strip semiconductor material disposed on a substrate, a gate standing astride the strip semiconductor material and dividing the strip semiconductor material into a source terminal, a drain terminal and a channel region wherein a source width of the source terminal is larger than or equal to a channel width, a dielectric layer sandwiched between the gate and the strip semiconductor material, and a capacitor unit disposed on the substrate and including the source terminal serving as a lower electrode.
摘要翻译：动态存储器结构包括设置在衬底上的带状半导体材料，跨越条状半导体材料的栅极，并将带状半导体材料分成源极端子，漏极端子和沟道区域，其中源极端子的源极宽度较大夹在栅极和带状半导体材料之间的电介质层，以及设置在基板上并包括用作下部电极的源极端子的电容器单元。

3. 发明授权

US6163047A Method of fabricating a self aligned contact for a capacitor over bitline, (COB), memory cell 有权
标题翻译：通过位线（COB），存储单元制造电容器的自对准接触的方法
公开(公告)号：US6163047A
公开(公告)日：2000-12-19
申请号：US351241
申请日：1999-07-12
申请人： Janmye Sung , Nicky Lu
发明人： Janmye Sung , Nicky Lu
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10888 , H01L27/10814
摘要： A process for fabricating a capacitor over bitline, DRAM device, using a self-aligned contact opening, through, and between the bitline structures, and featuring the formation of insulator spacers, on the sidewall of the bitline structures, formed after the opening of the self-aligned contact, has been developed. The self-aligned contact opening, located through the bitline structures, allows an increase in DRAM cell density to be achieved. The formation of insulator spacers, on the sidewall of the bitline structures, formed after the opening of the self-aligned contact, in a silicon oxide layer, allows silicon oxide to be used as the spacer material, thus resulting in capacitance decrease when compared to counterparts fabricated using silicon nitride spacers.
摘要翻译：一种用于通过位线制造电容器的过程，DRAM器件，使用位线结构之间的自对准接触开口，穿过和位于所述位线结构之间，并且在所述位线结构的侧壁上形成绝缘体间隔物，其特征在于，自对准接触，已开发。通过位线结构定位的自对准接触开口允许实现DRAM单元密度的增加。在氧化硅层中，在自对准接触开口之后形成的位线结构的侧壁上的绝缘体间隔物的形成允许使用氧化硅作为间隔物材料，从而导致与使用氮化硅间隔物制造的对应物。

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