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    • 5. 发明授权
    • Dynamic reference frequency for fractional-N Phase-Locked Loop
    • 分数N锁相环的动态参考频率
    • US09287886B2
    • 2016-03-15
    • US12366441
    • 2009-02-05
    • Steven C. CiccarelliFrederic BossuVladimir AparinKevin H. Wang
    • Steven C. CiccarelliFrederic BossuVladimir AparinKevin H. Wang
    • H04B1/40H03L7/197
    • H03L7/1974
    • Within a receiver, the frequency of a comparison reference clock signal supplied to a fractional-N Phase-Locked Loop (PLL) is dynamically changed such that undesirable reciprocal mixing of reference spurs with known jammers (for example, transmit leakage) is minimized. As the transmit channel changes within a band, and as the transmit leakage frequency changes, a circuit changes the frequency of the comparison reference clock signal such that reference spurs generated by the PLL are moved in frequency so that they do not reciprocally mix with transmitter leakage in undesirable ways. In a second aspect, the PLL is operable either as an integer-N PLL or a fractional-N PLL. In low total receive power situations, the PLL operates as an integer-N PLL to reduce receiver susceptibility to fractional-N spurs. In a third aspect, jammer detect information is used to determine the comparison reference clock signal frequency.
    • 在接收机内,提供给分数N锁相环(PLL)的比较参考时钟信号的频率被动态地改变,使得具有已知干扰的参考杂波(例如,传输泄漏)的不期望的相互混合被最小化。 当发射信道在频带内变化时,并且随着发射泄漏频率的变化,电路改变比较参考时钟信号的频率,使得PLL产生的参考杂波频率移动,使得它们不与发射机泄漏相互混合 以不良的方式。 在第二方面,PLL可以作为整数N个PLL或分数N PLL来操作。 在低总接收功率情况下,PLL作为整数N PLL进行操作,以减少接收机对分数N个杂散的敏感性。 在第三方面,使用干扰检测信息来确定比较参考时钟信号频率。
    • 6. 发明授权
    • Techniques for controlling operation of control loops in a receiver
    • 控制接收机控制回路运行的技术
    • US08781426B2
    • 2014-07-15
    • US11560802
    • 2006-11-16
    • Steven C. CiccarelliBrian BanisterBrian GeorgeSoon-Seng LauPrasad GudemArun Raghupathy
    • Steven C. CiccarelliBrian BanisterBrian GeorgeSoon-Seng LauPrasad GudemArun Raghupathy
    • H04B1/06
    • H04B1/109
    • Techniques for controlling operation of control loops in a receiver are described. The operation of at least one control loop is modified in conjunction with a change in operating state, which may correspond to a change in linearity state, gain state, operating frequency, antenna configuration, etc. A change in linearity state may occur when jammers are detected and may cause bias current of analog circuit blocks to be adjusted. The at least one control loop to be modified may include a DC loop, an AGC loop, etc. The operation of a control loop may be modified by disabling the control loop or changing its time constant prior to changing operating state, waiting a predetermined amount of time to allow the receiver to settle, and enabling the control loop or restoring its time constant after waiting the predetermined amount of time.
    • 描述了用于控制接收机中的控制环路的操作的技术。 结合操作状态的改变来修改至少一个控制回路的操作,其可以对应于线性状态,增益状态,操作频率,天线配置等的改变。线性状态的变化可能发生在干扰器 并且可能导致模拟电路块的偏置电流被调整。 要修改的至少一个控制环路可以包括DC环路,AGC环路等。可以通过在改变操作状态之前禁用控制环路或改变其时间常数来修改控制环路的操作,等待预定量 的时间以允许接收机安定,并且在等待预定时间量之后启用控制环路或恢复其时间常数。
    • 7. 发明授权
    • Dynamic LNA switch points based on channel conditions
    • 基于通道条件的动态LNA切换点
    • US08521198B2
    • 2013-08-27
    • US11560790
    • 2006-11-16
    • Steven C. CiccarelliBrian GeorgeSoon-Seng Lau
    • Steven C. CiccarelliBrian GeorgeSoon-Seng Lau
    • H04B15/00
    • H04B1/109H03F3/72H03F2200/294H03F2203/7231H04K3/224H04W52/0238Y02D70/1222Y02D70/40
    • Techniques for operating a receiver to linearity performance and higher receive signal to noise ratio are described. The receiver includes one or more circuit blocks, e.g., a low noise amplifier (LNA), having discrete gain states. The gain states are selected based on switch points, with each switch point indicating a specific received signal level at which to switch from one gain state to another gain state. The switch points may be dynamically selected based on channel conditions, which may be characterized by the presence or absence or strength or frequency of jammers. A first set of switch points may be selected when jammers are detected, and a second set of switch points may be selected when jammers are not detected. The gain states are selected in accordance with the set of switch points selected for use.
    • 描述了用于操作接收机以获得线性性能和较高接收信噪比的技术。 接收机包括具有离散增益状态的一个或多个电路块,例如低噪声放大器(LNA)。 根据切换点选择增益状态,每个开关点指示从一个增益状态切换到另一增益状态的特定接收信号电平。 可以基于信道条件动态地选择切换点,其可以由干扰的存在或不存在或强度或频率来表征。 当检测到干扰时,可以选择第一组切换点,并且当没有检测到干扰时可以选择第二组切换点。 增益状态根据选择使用的开关点集合进行选择。
    • 8. 发明申请
    • LO GENERATION WITH DESKEWED INPUT OSCILLATOR SIGNAL
    • LO生成与输入振荡器信号
    • US20100120390A1
    • 2010-05-13
    • US12270764
    • 2008-11-13
    • Vinod V. PanikkathPrasad S. GudemSteven C. Ciccarelli
    • Vinod V. PanikkathPrasad S. GudemSteven C. Ciccarelli
    • H04B1/16
    • H03B19/12G01R13/02H03B27/00H03D7/16
    • Techniques for generating local oscillator (LO) signals are described. In one design, an apparatus may include a deskew circuit and a divider circuit. The deskew circuit may receive a differential input oscillator signal having timing skew and provide a differential output oscillator signal having reduced timing skew. The differential input oscillator signal may include first and second input oscillator signals, and the differential output oscillator signal may include first and second output oscillator signals. In one design, the deskew circuit may include first and second variable delay circuits that receive the first and second input oscillator signals, respectively, and provide the first and second output oscillator signals, respectively. Each output oscillator signal may have an adjustable delay selected to reduce timing skew. The divider circuit may divide the differential output oscillator signal in frequency and provide differential I and Q divided signals, which may be used to generate LO signals.
    • 描述用于产生本地振荡器(LO)信号的技术。 在一种设计中,设备可以包括去歪斜电路和分频器电路。 偏移电路可以接收具有定时偏移的差分输入振荡器信号,并提供具有减小的定时偏移的差分输出振荡器信号。 差分输入振荡器信号可以包括第一和第二输入振荡器信号,并且差分输出振荡器信号可以包括第一和第二输出振荡器信号。 在一种设计中,歪斜电路可以包括分别接收第一和第二输入振荡器信号的第一和第二可变延迟电路,并分别提供第一和第二输出振荡器信号。 每个输出振荡器信号可以具有选择的可调延迟以减少定时偏移。 分频器电路可以分频差分输出振荡器信号,并提供差分I和Q分频信号,可用于产生LO信号。
    • 9. 发明授权
    • Programmable dynamic range receiver with adjustable dynamic range analog
to digital converter
    • 可编程动态范围接收器,具有可调动态范围的模数转换器
    • US6134430A
    • 2000-10-17
    • US987853
    • 1997-12-09
    • Saed G. YounisSeyfollah S. BazarjaniSteven C. Ciccarelli
    • Saed G. YounisSeyfollah S. BazarjaniSteven C. Ciccarelli
    • H03M1/18H03M3/02H04B1/10H04B1/16
    • H04B1/1027H03M3/488H04B1/109H03M3/404H03M3/414
    • A programmable dynamic range receiver which provides the requisite level of performance at reduced power consumption. The .SIGMA..DELTA. ADC within the receiver is designed with one or more loops. Each loop provides a predetermined dynamic range performance. The loops can be enabled or disabled based on the required dynamic range and a set of dynamic range thresholds. The .SIGMA..DELTA. ADC is also designed with adjustable bias current. The dynamic range of the .SIGMA..DELTA. ADC varies approximately proportional to the bias current. By adjusting the bias current, the required dynamic range can be provided by the .SIGMA..DELTA. ADC with minimal power consumption. A reference voltage of the .SIGMA..DELTA. ADC can be descreased when high dynamic range is not required, thereby allowing for less bias current in the .SIGMA..DELTA. ADC and supporting circuitry. The dynamic range of the .SIGMA..DELTA. ADC is a also function of the oversampling ratio which is proportional to the sampling frequency. High dynamic range requires a high oversampling ratio. When high dynamic range is not required, the sampling frequency can be lowered.
    • 可编程动态范围接收器,以降低功耗提供必要的性能水平。 接收机内的SIGMA DELTA ADC设计有一个或多个回路。 每个循环提供预定的动态范围性能。 可以根据所需的动态范围和一组动态范围阈值启用或禁用这些循环。 SIGMA DELTA ADC还设计有可调偏置电流。 SIGMA DELTA ADC的动态范围与偏置电流大致成正比。 通过调整偏置电流,所需的动态范围可由SIGMA DELTA ADC提供,功耗最小。 当不需要高动态范围时,可以降低SIGMA DELTA ADC的参考电压,从而在SIGMA DELTA ADC和支持电路中允许更少的偏置电流。 SIGMA DELTA ADC的动态范围也是与采样频率成比例的过采样比的函数。 高动态范围需要高过采样比。 当不需要高动态范围时,可以降低采样频率。
    • 10. 发明授权
    • Receiver with sigma-delta analog-to-digital converter for sampling a
received signal
    • 具有Σ-Δ模数转换器的接收器,用于对接收到的信号进行采样
    • US6005506A
    • 1999-12-21
    • US987306
    • 1997-12-09
    • Seyfollah S. BazarjaniSteven C. CiccarelliSaed G. YounisDaniel K. Butterfield
    • Seyfollah S. BazarjaniSteven C. CiccarelliSaed G. YounisDaniel K. Butterfield
    • H03M1/66H03D3/00H03D7/16H03M3/02H04B1/26H03M3/00H03K9/06
    • H04B1/0032H03D3/007H03D7/165H04B1/0003H04B1/0039H04B1/26
    • A receiver comprising a sigma-delta analog-to-digital converter (.SIGMA..DELTA. ADC) can be utilized in one of four configurations, as a subsampling bandpass receiver, a subsampling baseband receiver, a Nyquist sampling bandpass receiver, or a Nyquist sampling baseband receiver. For subsampling .SIGMA..DELTA. receivers, the sampling frequency is less than twice the center frequency of the input signal into the .SIGMA..DELTA. ADC. For Nyquist sampling .SIGMA..DELTA. receivers, the sampling frequency is at least twice the highest frequency of the input signal into the .SIGMA..DELTA. ADC. For baseband .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is approximately zero or DC. For bandpass .SIGMA..DELTA. receivers, the center frequency of the output signal from the .SIGMA..DELTA. ADC is greater than zero. The sampling frequency can be selected based on the bandwidth of the input signal to simplify the design of the digital circuits used to process the output samples from the .SIGMA..DELTA. ADC. Furthermore, the center frequency of the input signal can be selected based on the sampling frequency and the bandwidth of the input signal. The .SIGMA..DELTA. ADC within the receiver provides many benefits.
    • 包括Σ-Δ模数转换器(SIGMA DELTA ADC)的接收机可以用于四种配置中的一种,作为子采样带通接收机,子采样基带接收机,奈奎斯特采样带通接收机或奈奎斯特采样基带接收机 。 对于子采样SIGMA DELTA接收机,采样频率小于进入SIGMA DELTA ADC的输入信号的中心频率的两倍。 对于奈奎斯特采样SIGMA DELTA接收机,采样频率至少是SIGMA DELTA ADC输入信号的最高频率的两倍。 对于基带SIGMA DELTA接收机,来自SIGMA DELTA ADC的输出信号的中心频率大约为零或DC。 对于带通SIGMA DELTA接收机,来自SIGMA DELTA ADC的输出信号的中心频率大于零。 可以根据输入信号的带宽选择采样频率,以简化用于处理SIGMA DELTA ADC的输出采样的数字电路的设计。 此外,可以基于输入信号的采样频率和带宽来选择输入信号的中心频率。 接收机内的SIGMA DELTA ADC提供了许多好处。