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1. 发明授权

US07626456B2 Overdrive control system 有权
标题翻译：超速控制系统
公开(公告)号：US07626456B2
公开(公告)日：2009-12-01
申请号：US12121143
申请日：2008-05-15
申请人： Pietro Antonio Paolo Calö , Philippe Sirito-Olivier , Mario Chiricosta
发明人： Pietro Antonio Paolo Calö , Philippe Sirito-Olivier , Mario Chiricosta
IPC分类号： H03F21/00
CPC分类号： H03F1/3211
摘要： An overdrive control system includes a voltage controlled current source to deliver a compensation current, and being between a first voltage reference and an internal node, which is connected to an output terminal. The voltage controlled current source has a control terminal connected to an output terminal of an adding block, which has a positive input connected to an input terminal. At least one clamping block is between the output terminal and a second voltage reference, and is connected to a negative input of the adding block. The voltage controlled current source delivers its compensation current to the output terminal when a voltage signal on the input terminal has an higher value than a voltage signal on the output terminal, and forces an output voltage signal to follow an input voltage signal to an extent that depends on a clamping voltage provided by the clamping block.
摘要翻译：超速控制系统包括用于传送补偿电流的电压控制电流源，以及连接到输出端子的第一电压基准和内部节点之间。压控电流源具有连接到加法块的输出端子的控制端子，其具有连接到输入端子的正输入端。至少一个钳位块位于输出端和第二参考电压之间，并连接到加法块的负输入端。当输入端子上的电压信号值高于输出端子上的电压信号时，电压控制电流源将其补偿电流输出到输出端子，并迫使输出电压信号跟随输入电压信号，取决于夹紧块提供的钳位电压。

2. 发明授权

US07408418B2 Phase locked loop circuit having reduced lock time 有权
标题翻译：锁相环电路具有减少的锁定时间
公开(公告)号：US07408418B2
公开(公告)日：2008-08-05
申请号：US11480757
申请日：2006-06-30
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： H03L7/093 , H03D3/02
CPC分类号： H03L7/10 , H03L7/0995 , H03L7/107 , H03L2207/06
摘要： A phase locked loop circuit comprising a phase detector having a first input for receiving a first frequency signal and an output, a first filter adapted to filter the output electric signal of the phase detector, a voltage controlled oscillator adapted to generate a second frequency signal in response to the output filtered signal of the phase detector. The phase detector has a second input for receiving the second frequency signal and is adapted to compare it with the first frequency signal. The circuit comprises means adapted to amplify the difference between an electric signal coupled with the output of the phase detector and a reference electric signal and a second filter adapted to receive the output electric signal of the amplification means and to send an output electric signal to the voltage controlled oscillator. The circuit comprises further means adapted to modify the value of the electric signal in input to the second filter to decrease the response time of the second filter.
摘要翻译：一种锁相环电路，包括具有用于接收第一频率信号和输出的第一输入的相位检测器，适于滤波相位检测器的输出电信号的第一滤波器，适于产生第二频率信号的压控振荡器响应于相位检测器的输出滤波信号。相位检测器具有用于接收第二频率信号的第二输入，并且适于将其与第一频率信号进行比较。电路包括适于放大与相位检测器的输出耦合的电信号与参考电信号之间的差的装置，以及适于接收放大装置的输出电信号的第二滤波器，并将输出电信号发送到压控振荡器。该电路包括适于修改输入到第二滤波器的电信号的值以减少第二滤波器的响应时间的装置。

3. 发明授权

US07190218B2 Differential or single-ended amplifier and relative control method 失效
标题翻译：差分或单端放大器及相对控制方式
公开(公告)号：US07190218B2
公开(公告)日：2007-03-13
申请号：US11055925
申请日：2005-02-11
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： H03F1/24
CPC分类号： H03F3/45098 , H03F1/302 , H03F3/45538
摘要： The method controls, in a feedback mode, a common collector or common drain amplifier, biased with a voltage applied on a bias node produced by a biasing circuit that generates a temperature compensated reference voltage from which the bias voltage applied on the bias node of the amplifier is derived. The quiescent voltage on the output node of the amplifier is made substantially independent from temperature by sensing the quiescent voltage on the output node, and adjusting the voltage applied on the bias node of the amplifier based upon the difference between the reference voltage and the sensed quiescent voltage for maintaining it constant.
摘要翻译：该方法在反馈模式下控制公共集电极或公共漏极放大器，该偏置电压施加在由偏置电路产生的偏置电路上的电压，该偏置电路产生温度补偿的参考电压，从而施加在偏置节点上的偏置电压派生放大器。放大器的输出节点上的静态电压通过感测输出节点上的静态电压而基本上与温度无关，并且基于参考电压和感测到的静态之间的差异来调节施加在放大器的偏置节点上的电压电压保持恒定。

4. 发明授权

US07123091B2 Darlington differential amplifier 有权
标题翻译：达林顿差分放大器
公开(公告)号：US07123091B2
公开(公告)日：2006-10-17
申请号：US10944531
申请日：2004-09-17
申请人： Philippe Sirito-Olivier , Pietro Antonio Calo′
发明人： Philippe Sirito-Olivier , Pietro Antonio Calo′
IPC分类号： H03F3/45 , H03G3/12
CPC分类号： H03F3/45085 , H03F2203/45352 , H03F2203/45361 , H03F2203/45392
摘要： A Darlington differential amplifier includes a differential pair of Darlington transistors, with each pair including a first transistor and a second transistor connected in cascade to the first transistor. The first transistor is controlled by an externally generated voltage and drives the second transistor. The first and second transistors each include first and second conducting terminals, with the first conducting terminals being connected together and forming an output node of the amplifier. A first degeneration impedance is connected between the second conduction terminals of the second transistors in the pair of Darlington transistors. A second degeneration impedance is connected between the second conduction terminals of the first transistors in the pair of Darlington transistors for reducing harmonic distortion of the amplifier.
摘要翻译：达林顿差分放大器包括达林顿晶体管的差分对，每对包括与第一晶体管级联连接的第一晶体管和第二晶体管。第一晶体管由外部产生的电压控制并驱动第二晶体管。第一和第二晶体管各自包括第一和第二导电端子，其中第一导电端子连接在一起并形成放大器的输出节点。第一退化阻抗连接在该对达林顿晶体管中的第二晶体管的第二导通端之间。第二退化阻抗连接在该对达林顿晶体管中的第一晶体管的第二导通端之间，用于减小放大器的谐波失真。

5. 发明授权

US07579974B2 Digitizer for a digital receiver system 有权
标题翻译：用于数字接收机系统的数字化仪
公开(公告)号：US07579974B2
公开(公告)日：2009-08-25
申请号：US12121073
申请日：2008-05-15
申请人： Mario Chiricosta , Philippe Sirito-Olivier , Pietro Antonio Paolo Calō
发明人： Mario Chiricosta , Philippe Sirito-Olivier , Pietro Antonio Paolo Calō
IPC分类号： H03M1/12
CPC分类号： H04L25/0292 , H04L27/0002
摘要： A digitizer for a digital receiver system includes an input terminal to receive a modulated analog input voltage signal, and an output terminal to provide an output voltage signal being a digital conversion of the input voltage signal. A comparator circuit has an output coupled to the output terminal and includes an operational amplifier having a first input terminal coupled to the input terminal. A threshold generator circuit is between the input terminal and a second input terminal of the at least one operational amplifier, to provide a tunable voltage reference signal thereto. The threshold generator circuit includes a thresholding circuit to determine a threshold voltage value of the modulated analog input voltage signal, and a tunable voltage reference circuit coupled to the thresholding circuit to generate the tunable voltage reference signal as a function of the threshold voltage value of the modulated analog input voltage signal.
摘要翻译：用于数字接收机系统的数字转换器包括用于接收经调制的模拟输入电压信号的输入端子和输出端子，以提供作为输入电压信号的数字转换的输出电压信号。比较器电路具有耦合到输出端的输出，并且包括具有耦合到输入端的第一输入端的运算放大器。阈值发生器电路位于至少一个运算放大器的输入端和第二输入端之间，以向其提供可调参考信号。阈值发生器电路包括阈值电路，用于确定调制的模拟输入电压信号的阈值电压值，以及耦合到阈值电路的可调电压参考电路，以产生可调电压参考信号，作为阈值电压值的函数调制模拟输入电压信号。

6. 发明授权

US06590371B2 Current source able to operate at low supply voltage and with quasi-null current variation in relation to the supply voltage 失效
公开(公告)号：US06590371B2
公开(公告)日：2003-07-08
申请号：US10082785
申请日：2002-02-25
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： G05F316
CPC分类号： G05F3/267 , G05F3/262 , G05F3/265
摘要： A current source includes a current mirror and a core connected together between two supply terminals. The current mirror comprises a pilot transistor and first and second recopy transistors. The core comprises first and second transistors and a resistance. The first transistor and the first recopy transistor are connected together to form a first branch. The resistance and the second recopy transistor are connected together to form a second branch. The pilot transistor and the second transistor are connected together to form a third branch. These branches are connected between the two supply terminals. The first transistor is linked to the second branch between the resistance and the second recopy transistor. The second transistor is connected to the first branch between the first core transistor and the first recopy transistor.

7. 发明授权

US06465998B2 Current source with low supply voltage and with low voltage sensitivity 有权
标题翻译：具有低电源电压和低电压灵敏度的电流源
公开(公告)号：US06465998B2
公开(公告)日：2002-10-15
申请号：US09864917
申请日：2001-05-24
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： G05F316
CPC分类号： G05F3/265
摘要： A current source includes a master branch including a branch current fixing resistor, at least one slave branch, and a current mirror including a mirror transistor in each of the master and slave branches, respectively, to couple the branches. The current source may additionally include at least one of a first circuit for injecting in the current fixing resistor a current proportional to the master branch current and a second circuit for injecting in a degeneration resistor of the mirror transistor of the slave branch a current proportional to a current of the slave branch. The invention is particularly applicable to the manufacture of integrated circuits.
摘要翻译：电流源分别包括分支电流固定电阻器，至少一个从分支以及在每个主分支和从属支路中包括镜像晶体管的电流镜的主分支，以耦合分支。电流源可以另外包括用于在电流固定电阻器中注入与主分支电流成比例的电流的第一电路和用于在从分支的反射镜晶体管的退化电阻器中注入的电流中的至少一个，电流与奴隶分支的电流。本发明特别适用于集成电路的制造。

8. 发明授权

US06388531B1 Voltage controlled oscillator with reduced parasitic interference 有权
标题翻译：具有降低寄生干扰的压控振荡器
公开(公告)号：US06388531B1
公开(公告)日：2002-05-14
申请号：US09707376
申请日：2000-11-07
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： H03L7085
CPC分类号： H03L7/0891
摘要： A phase locked loop for a voltage controlled oscillator includes a phase comparator receiving at its inputs a reference frequency signal and a frequency signal from the oscillator, and supplies logic values to command a charge pump. A charge re-injection circuit receives one of the inputs of the comparator and supplies a logic value to command the charge pump. The loop further includes a detector with a threshold value for a current representative of the current supplied by the charge pump. A logic output from the detector is applied to the charge re-injection circuit so that the duration of the charge re-injection is limited.
摘要翻译：用于压控振荡器的锁相环包括相位比较器，在其输入端接收参考频率信号和来自振荡器的频率信号，并提供逻辑值以命令电荷泵。电荷再注入电路接收比较器的输入之一，并提供一个逻辑值来命令电荷泵。环路还包括具有代表由电荷泵提供的电流的电流的阈值的检测器。来自检测器的逻辑输出被施加到电荷再注入电路，使得电荷再注入的持续时间受到限制。

9. 发明授权

US06335677B1 Comparator of a digital value having CMOS voltage levels with a digital value having ECL voltage levels 有权
标题翻译：具有具有ECL电压电平的数字值的CMOS电压电平的数字值的比较器
公开(公告)号：US06335677B1
公开(公告)日：2002-01-01
申请号：US09550920
申请日：2000-04-17
申请人： Philippe Sirito-Olivier
发明人： Philippe Sirito-Olivier
IPC分类号： G05B100
CPC分类号： G06F7/02 , G06F2207/4806
摘要： A comparator of a first digital value of n bits having CMOS voltage levels with a second digital value of n bits having ECL, or CML voltage levels, including a decoder in CMOS technology provided to provide 2n CMOS signals, each of which corresponds to a different product of n bits, each of the n bits being a respective bit of the first digital value or its complement; 2n AND gates in ECL or CML technology respectively associated with the 2n CMOS signals, connected to implement an OR function of 2n ECL or CML signals, each of which corresponds to a different product of n bits taken from among the bits of the second value or their complements, according to the same choice as for the product of n bits of the respective CMOS signal; and means for deactivating the AND gates associated with the CMOS signals to 0.
摘要翻译：具有CMOS电压电平的具有具有ECL的n位的第二数字值或CML电压电平的n位的第一数字值的比较器，包括提供2n个CMOS信号的CMOS技术的解码器，每个CMOS信号对应于不同的 n位的乘积，n位中的每一个是第一数字值或其补码的相应位; 分别与2n个CMOS信号相关联的ECL或CML技术中的2n个AND门，被连接以实现2n ECL或CML信号的OR功能，其中每一个对应于从第二个值的位中取得的n位的不同乘积，它们的补码，根据相应CMOS信号的n位产品的相同选择; 以及用于将与CMOS信号相关联的与门去激活为0的装置。

10. 发明授权

US09485575B2 Pre-filtering for loudspeakers protection 有权
标题翻译：预过滤扬声器保护
公开(公告)号：US09485575B2
公开(公告)日：2016-11-01
申请号：US14129690
申请日：2012-06-28
申请人： Philippe Marguery , Angelo Nagari , Philippe Sirito-Olivier
发明人： Philippe Marguery , Angelo Nagari , Philippe Sirito-Olivier
IPC分类号： H04R3/00
CPC分类号： H04R3/007 , H04R3/002
摘要： The present invention relates to a method of protecting an inductive loudspeaker. The method comprises filtering the audio stream by applying a compensation filter to the audio stream, sending the filtered audio stream to the inductive loudspeaker, computing an estimation of a frequency response of the inductive loudspeaker and updating the compensation filter so as to attenuate a frequency corresponding to a resonant frequency in the estimated frequency response of the inductive loudspeaker.
摘要翻译：本发明涉及一种保护感应式扬声器的方法。该方法包括通过对音频流施加补偿滤波器来对音频流进行滤波，将经滤波的音频流发送到感应式扬声器，计算感应式扬声器的频率响应的估计，并更新补偿滤波器以便衰减对应的频率达到感应式扬声器的估计频率响应中的谐振频率。

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