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1. 发明申请

US20120166779A1 METHOD, APPARATUS AND SYSTEM TO SAVE PROCESSOR STATE FOR EFFICIENT TRANSITION BETWEEN PROCESSOR POWER STATES 有权
标题翻译：处理器功率状态下有效转换处理器状态的方法，装置和系统
公开(公告)号：US20120166779A1
公开(公告)日：2012-06-28
申请号：US13075057
申请日：2011-03-29
申请人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
发明人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
IPC分类号： G06F15/177
CPC分类号： G06F1/3203 , G06F1/3206 , G06F1/3237 , G06F1/3268 , G06F1/3275 , G06F1/3278 , G06F11/3024 , G06F11/3055 , Y02D10/128 , Y02D10/13 , Y02D10/14 , Y02D10/154 , Y02D10/157
摘要： Techniques to provide processor state for implementing a power state transition of a processor. In an embodiment, an operating system executing on a processor detects an opportunity to transition the processor to an idle processor power state. In particular embodiments, the operating system initiates the transition by invoking a task switch, wherein information describing a state of the processor is saved to a task switch segment.
摘要翻译：提供处理器状态以实现处理器的功率状态转换的技术。在一个实施例中，在处理器上执行的操作系统检测到将处理器转换到空闲处理器电源状态的机会。在特定实施例中，操作系统通过调用任务交换机来启动转换，其中描述处理器的状态的信息被保存到任务切换段。

2. 发明申请

US20120166843A1 METHOD, APPARATUS AND SYSTEM TO TRANSITION SYSTEM POWER STATE OF A COMPUTER PLATFORM 有权
标题翻译：计算机平台过渡系统功率状态的方法，装置和系统
公开(公告)号：US20120166843A1
公开(公告)日：2012-06-28
申请号：US13077882
申请日：2011-03-31
申请人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
发明人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3206 , G06F1/3237 , G06F1/3268 , G06F1/3275 , G06F1/3278 , G06F11/3024 , G06F11/3055 , Y02D10/128 , Y02D10/13 , Y02D10/14 , Y02D10/154 , Y02D10/157
摘要： Techniques to tie a processor power state transition on a platform to another power state transition on the platform. In an embodiment, processor governor functionality of an operating system detects an idle condition of a processor executing the operating system. Based on the processor idle condition and one or more indicated conditions of other platform devices, tying logic may determine a system power state to transition the platform to. For example, the tying logic may select from one of a plurality of idle standby system power states.
摘要翻译：将平台上的处理器电源状态转换与平台上的另一个电源状态转换相结合的技术。在一个实施例中，操作系统的处理器调节器功能检测执行操作系统的处理器的空闲状态。基于处理器空闲条件和其他平台设备的一个或多个指示条件，绑定逻辑可以确定将平台转换到的系统功率状态。例如，绑定逻辑可以从多个空闲备用系统电源状态中的一个中选择。

3. 发明授权

US08601304B2 Method, apparatus and system to transition system power state of a computer platform 有权
标题翻译：计算机平台过渡系统电源状态的方法，装置和系统
公开(公告)号：US08601304B2
公开(公告)日：2013-12-03
申请号：US13077882
申请日：2011-03-31
申请人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
发明人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/3206 , G06F1/3237 , G06F1/3268 , G06F1/3275 , G06F1/3278 , G06F11/3024 , G06F11/3055 , Y02D10/128 , Y02D10/13 , Y02D10/14 , Y02D10/154 , Y02D10/157
摘要： Techniques to tie a processor power state transition on a platform to another power state transition on the platform. In an embodiment, processor governor functionality of an operating system detects an idle condition of a processor executing the operating system. Based on the processor idle condition and one or more indicated conditions of other platform devices, tying logic may determine a system power state to transition the platform to. For example, the tying logic may select from one of a plurality of idle standby system power states.
摘要翻译：将平台上的处理器电源状态转换与平台上的另一个电源状态转换相结合的技术。在一个实施例中，操作系统的处理器调节器功能检测执行操作系统的处理器的空闲状态。基于处理器空闲条件和其他平台设备的一个或多个指示条件，绑定逻辑可以确定将平台转换到的系统功率状态。例如，绑定逻辑可以从多个空闲备用系统电源状态中的一个中选择。

4. 发明授权

US08775836B2 Method, apparatus and system to save processor state for efficient transition between processor power states 有权
标题翻译：方法，装置和系统，以节省处理器状态以在处理器电源状态之间有效转换
公开(公告)号：US08775836B2
公开(公告)日：2014-07-08
申请号：US13075057
申请日：2011-03-29
申请人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
发明人： Rajeev D. Muralidhar , Harinarayanan Seshadri , Bruce L. Fleming , Vishwesh M. Rudramuni
IPC分类号： G06F1/32
CPC分类号： G06F1/3203 , G06F1/3206 , G06F1/3237 , G06F1/3268 , G06F1/3275 , G06F1/3278 , G06F11/3024 , G06F11/3055 , Y02D10/128 , Y02D10/13 , Y02D10/14 , Y02D10/154 , Y02D10/157
摘要： Techniques to provide processor state for implementing a power state transition of a processor. In an embodiment, an operating system executing on a processor detects an opportunity to transition the processor to an idle processor power state. In particular embodiments, the operating system initiates the transition by invoking a task switch, wherein information describing a state of the processor is saved to a task switch segment.
摘要翻译：提供处理器状态以实现处理器的功率状态转换的技术。在一个实施例中，在处理器上执行的操作系统检测到将处理器转换到空闲处理器电源状态的机会。在特定实施例中，操作系统通过调用任务交换机来启动转换，其中描述处理器的状态的信息被保存到任务切换段。

5. 发明授权

US10133336B2 Dynamically entering low power states during active workloads 有权
公开(公告)号：US10133336B2
公开(公告)日：2018-11-20
申请号：US14128945
申请日：2012-11-27
申请人： Ren Wang , Tsung-Yuan C. Tai , Jr-Shian Tsai , Bruce L. Fleming , Rajeev D. Muralidhar , Mesut A. Ergin , Prakash N. Iyer , Harinarayanan Seshadri
发明人： Ren Wang , Tsung-Yuan C. Tai , Jr-Shian Tsai , Bruce L. Fleming , Rajeev D. Muralidhar , Mesut A. Ergin , Prakash N. Iyer , Harinarayanan Seshadri
IPC分类号： G06F1/32
摘要： Systems and methods may provide for identifying runtime information associated with an active workload of a platform, and making an active idle state determination for the platform based on at least in part the runtime information. In addition, a low power state of a shared resource on the platform may be controlled concurrently with an execution of the active workload based on at least in part the active idle state determination.

6. 发明申请

US20140101674A1 COORDINATING DEVICE AND APPLICATION BREAK EVENTS FOR PLATFORM POWER SAVING 有权
标题翻译：协调设备和用于平台节电的应用事件
公开(公告)号：US20140101674A1
公开(公告)日：2014-04-10
申请号：US14105770
申请日：2013-12-13
申请人： Ren Wang , Jr-Shian Tsai , Tsung-Yuan C. Tai , Mesut A. Ergin , Prakash N. Iyer , Bruce L. Fleming
发明人： Ren Wang , Jr-Shian Tsai , Tsung-Yuan C. Tai , Mesut A. Ergin , Prakash N. Iyer , Bruce L. Fleming
IPC分类号： G06F9/54
CPC分类号： G06F9/4881 , G06F1/3203 , G06F9/54 , G06F9/542
摘要： Systems and methods of managing break events may provide for detecting a first break event from a first event source and detecting a second break event from a second event source. In one example, the event sources can include devices coupled to a platform as well as active applications on the platform. Issuance of the first and second break events to the platform can be coordinated based on at least in part runtime information associated with the platform.
摘要翻译：管理中断事件的系统和方法可以提供从第一事件源检测第一中断事件并从第二事件源检测第二中断事件。在一个示例中，事件源可以包括耦合到平台的设备以及平台上的活动应用。可以基于至少部分与平台相关联的运行时信息来协调向平台发出第一和第二休息事件。

7. 发明授权

US07774626B2 Method to control core duty cycles using low power modes 有权
标题翻译：使用低功耗模式控制核心占空比的方法
公开(公告)号：US07774626B2
公开(公告)日：2010-08-10
申请号：US11729792
申请日：2007-03-29
申请人： Bruce L. Fleming
发明人： Bruce L. Fleming
IPC分类号： G06F1/26 , G06F1/32
CPC分类号： G06F1/3228
摘要： A processor starting a duty cycle timer with a specified duty cycle period and a specified power state, and if the duty cycle timer expires, placing the processor in the specified power state in response to the expiry of the timer, if the timer has not expired and if an interrupt other than a timer tick interrupt is received, canceling the duty cycle timer in response to the interrupt other than a timer tick interrupt.
摘要翻译：处理器以指定的占空比周期和指定的功率状态启动占空比定时器，并且如果占空比定时器期满，则响应于定时器的到期将处理器置于指定的电源状态，如果定时器尚未到期并且如果接收到定时器中断以外的中断，则响应于定时器复选中断以外的中断，取消占空比定时器。

8. 发明授权

US06249739B1 Operating vehicular processor-based systems 有权
标题翻译：基于车载处理器的系统
公开(公告)号：US06249739B1
公开(公告)日：2001-06-19
申请号：US09387349
申请日：1999-08-31
申请人： Lee P. Noehring , Bruce L. Fleming
发明人： Lee P. Noehring , Bruce L. Fleming
IPC分类号： G06F130
CPC分类号： G06F11/1441 , G06F1/305
摘要： A processor-based system in a vehicle may be quickly suspended to a lower power consumption state after detecting a signal indicative of engine cranking. Advantageously, the system may be caused to enter the lower power consumption state prior to the time that power is reduced as a result of engine cranking. If the operating system is active when the signal is detected, a routine may be called which causes device contexts to be saved before returning the system to a reduced power consumption state. Otherwise, if the operating system is inactive, an interrupt handler may be called which immediately returns the system to a reduced power consumption state. In this way, the system may be reliably restored to a lower power consumption state before being exposed to the power reduction inherent in engine cranking.
摘要翻译：在检测到指示发动机起动的信号之后，车辆中的基于处理器的系统可以被快速地暂停到较低的功率消耗状态。有利地，可以在由于发动机起动而减少功率的时间之前使系统进入较低的功率消耗状态。如果在检测到信号时操作系统处于活动状态，则可能会调用一个程序，这样可以在将系统恢复到降低功耗状态之前保存设备上下文。否则，如果操作系统不活动，则可以调用中断处理程序，该中断处理程序立即将系统返回到降低的功耗状态。以这种方式，在暴露于发动机起动中固有的功率降低之前，系统可以可靠地恢复到较低的功率消耗状态。

9. 发明申请

US20130124898A1 METHOD, SYSTEM AND APPARATUS FOR LOW-POWER STORAGE OF PROCESSOR CONTEXT INFORMATION 有权
标题翻译：用于处理器上下文信息的低功率存储的方法，系统和装置
公开(公告)号：US20130124898A1
公开(公告)日：2013-05-16
申请号：US13736829
申请日：2013-01-08
申请人： Bruce L. Fleming , Ashish V. Choubal , Sanjoy K. Mondal , Belliappa M. Kuttanna
发明人： Bruce L. Fleming , Ashish V. Choubal , Sanjoy K. Mondal , Belliappa M. Kuttanna
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3203
摘要： A method and system for saving and/or retrieving context information of a processor core for a power state transition. The processor core resides in a complex power domain variously transitioning between a plurality of power states. The processor core includes a local context storage area for storage and retrieval of processor core context information. A low power context storage resides in a nominal power domain external to the complex power domain. Context information of the processor core is stored to the low power context storage based on whether a power state transition of the complex power domain includes a transition to power down the processor core.
摘要翻译：一种用于保存和/或检索用于电力状态转换的处理器核心的上下文信息的方法和系统。处理器核心驻留在多个功率状态之间不同地转换的复杂功率域。处理器核心包括用于存储和检索处理器核心上下文信息的本地上下文存储区域。低功耗上下文存储位于复合功率域外的标称功率域。基于复电力域的功率状态转换是否包括向处理器核心断电的过渡，将处理器核心的上下文信息存储到低功率上下文存储器。

10. 发明申请

US20120166172A1 PROVIDING LEGACY COMPUTING COMPATIBILITY 审中-公开
标题翻译：提供诉讼计算的兼容性
公开(公告)号：US20120166172A1
公开(公告)日：2012-06-28
申请号：US12977698
申请日：2010-12-23
申请人： Bruce L. Fleming , Arvin Mandhani , Achmed A. Zahir , Satish B. Acharya
发明人： Bruce L. Fleming , Arvin Mandhani , Achmed A. Zahir , Satish B. Acharya
IPC分类号： G06F13/12
CPC分类号： G06F13/105
摘要： In some embodiments if a transaction is directed at existing hardware, then the transaction is directed to existing hardware. If the transaction is not directed at existing hardware, then the transaction is sent through a behavioral model. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，如果事务针对现有硬件，则事务被定向到现有硬件。如果事务没有针对现有的硬件，则通过行为模型发送事务。描述和要求保护其他实施例。

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