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    • 1. 发明授权
    • System and method for synchronous payload envelope mapping without pointer adjustments
    • 无指针调整的同步有效载荷包络映射的系统和方法
    • US07826490B2
    • 2010-11-02
    • US11478249
    • 2006-06-29
    • Ravi SubrahmanyanGlen W. MillerXingen James RenDimitrios Giannakopoulos
    • Ravi SubrahmanyanGlen W. MillerXingen James RenDimitrios Giannakopoulos
    • H04J3/06
    • H04J3/1611H04J3/076
    • A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.
    • 提供了一种用于将信息映射到同步有效载荷信封(SPE)的系统和方法。 该方法以基于系统时钟的标准数据速率提供大约等于系统时钟的信息字节,但可以进行调整。 外部时钟的速率大致等于系统时钟速率。 该方法生成具有相同位置的信息字节的SPE,而不管系统和外部时钟速率之间的差异。 SPE与传输开销(TOH)组合,并以外部时钟速率作为消息帧发送。 尽管系统和外部时钟速率之间存在差异,但仍生成维持每个SPE内的信息字节的位置而无指针调整的SPE。 以另一种方式表示,消息帧由有效载荷和TOH部分生成,并且信息字节专门位于有效载荷部分中。 因此,对于所有的SPE来说,维持恒定指针值(例如,H1 / H2或V1 / V2)。
    • 5. 发明授权
    • Synchronous payload envelope mapping without pointer adjustments
    • 无指针调整的同步有效载荷包络映射
    • US07940806B1
    • 2011-05-10
    • US12888930
    • 2010-09-23
    • Ravi SubrahmanyanGlen W. MillerXingen (James) RenDimitrios Giannakopoulos
    • Ravi SubrahmanyanGlen W. MillerXingen (James) RenDimitrios Giannakopoulos
    • H04J3/06
    • H04J3/1611H04J3/076
    • A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.
    • 提供了一种用于将信息映射到同步有效载荷信封(SPE)的系统和方法。 该方法以基于系统时钟的标准数据速率提供大约等于系统时钟的信息字节,但可以进行调整。 外部时钟的速率大致等于系统时钟速率。 该方法生成具有相同位置的信息字节的SPE,而不管系统和外部时钟速率之间的差异。 SPE与传输开销(TOH)组合,并以外部时钟速率作为消息帧发送。 尽管系统和外部时钟速率之间存在差异,但仍生成维持每个SPE内的信息字节的位置而无指针调整的SPE。 以另一种方式表示,消息帧由有效载荷和TOH部分生成,并且信息字节专门位于有效载荷部分中。 因此,对于所有的SPE来说,维持恒定指针值(例如,H1 / H2或V1 / V2)。
    • 6. 发明申请
    • System and method for synchronous payload envelope mapping without pointer adjustments
    • 无指针调整的同步有效载荷包络映射的系统和方法
    • US20080002717A1
    • 2008-01-03
    • US11478249
    • 2006-06-29
    • Ravi SubrahmanyanGlen W. MillerXingen James RenDimitrios Giannakopoulos
    • Ravi SubrahmanyanGlen W. MillerXingen James RenDimitrios Giannakopoulos
    • H04L12/56
    • H04J3/1611H04J3/076
    • A system and method are provided for mapping information into Synchronous Payload Envelopes (SPEs). The method provides information bytes at a nominal system clock-based data rate, which is about equal to a system clock, but may be adjusted. An external clock has a rate approximately equal to the system clock rate. The method generates SPEs with identically-positioned information bytes, regardless of differences between the system and external clock rates. The SPEs are combined with Transport Overhead (TOH) and transmitted as a message frame at the external clock rate. SPEs are generated maintaining the positions of the information bytes within each SPE, without pointer adjustments, despite differences between the system and external clock rates. Expressed another way, message frames are generated with payload and TOH sections, and the information bytes are located exclusively in the payload sections. As a result, constant pointer values (e.g., H1/H2 or V1/V2) are maintained for all the SPEs.
    • 提供了一种用于将信息映射到同步有效载荷信封(SPE)的系统和方法。 该方法以基于系统时钟的标准数据速率提供大约等于系统时钟的信息字节,但可以进行调整。 外部时钟的速率大致等于系统时钟速率。 该方法生成具有相同位置的信息字节的SPE,而不管系统和外部时钟速率之间的差异。 SPE与传输开销(TOH)组合,并以外部时钟速率作为消息帧发送。 尽管系统和外部时钟速率之间存在差异,但仍生成维持每个SPE内的信息字节的位置而无指针调整的SPE。 以另一种方式表示,消息帧由有效载荷和TOH部分生成,并且信息字节专门位于有效载荷部分中。 因此,对于所有的SPE来说,维持恒定指针值(例如,H1 / H2或V1 / V2)。
    • 8. 发明授权
    • System and method for the aggregation of 10GBASE-R signals into pseudo 100GBASE-R signals
    • 将10GBASE-R信号聚合成伪100GBASE-R信号的系统和方法
    • US08761209B1
    • 2014-06-24
    • US13285562
    • 2011-10-31
    • Matthew BrownDimitrios Giannakopoulos
    • Matthew BrownDimitrios Giannakopoulos
    • H04J3/02H04L12/54H04L29/06
    • H04L12/413
    • An Ethernet physical layer (PHY) module is provided with a method for transceiving between a 10GBASE-R client interface and a 100G attachment interface. On each of ten client interface logical lanes a 10GBASE-R signal is accepted. Each 10GBASE-R logical lane is demultiplexed into two 5 gigabit per second (Gbps) pseudo 100GBASE-R logical lanes, creating a total of twenty pseudo 100GBASE-R logical lanes. The pseudo 100GBASE-R logical lanes are arranged into n groups of 20/n pseudo 100GBASE-R logical lanes. Further, the pseudo 100GBASE-R logical lanes from each group are arranged into a 100G attachment logical lane. Finally, a 100G attachment logical lane is transmitted at an attachment interface on each of n physical lanes. In the reverse direction, each of n physical lanes accepts a 100G attachment logical lane at the attachment interface, and a de-aggregation process supplies a 10GBASE-R signal on each of ten client interface logical lanes.
    • 以太网物理层(PHY)模块提供了一种用于在10GBASE-R客户端接口和100G附件接口之间进行收发的方法。 在10个客户端界面逻辑通道中的每一个上接受10GBASE-R信号。 每个10GBASE-R逻辑通道被解复用为两个5千兆位/秒(Gbps)伪100GBASE-R逻辑通道,共创建了20个伪100GBASE-R逻辑通道。 伪100GBASE-R逻辑通道被排列成n组20 / n个伪100GBASE-R逻辑通道。 此外,来自每组的伪100GBASE-R逻辑通道被排列成100G附件逻辑通道。 最后,在n个物理通道中的每一个上的附着接口上发送100G附件逻辑通道。 在相反的方向上,n个物理通道中的每一个在附接接口处接受100G的连接逻辑通道,并且去聚合处理在十个客户端接口逻辑通道中的每一个上提供10GBASE-R信号。