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1. 发明授权

US11316520B2 Transmitter for transmitting multi-bit data 有权
公开(公告)号：US11316520B2
公开(公告)日：2022-04-26
申请号：US17164627
申请日：2021-02-01
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Changho Hyun , Suhwan Kim
IPC分类号： H03K17/16 , H03K19/017 , H03K19/17728 , H03K19/173 , H03K19/09 , H03K19/0185
摘要： A transmitter includes a driving circuitry configured to drive a channel coupled to an output node by controlling an output impedance of a pull-up path, an output impedance of a pull-down path, or both, according to one or more multi-bit data signals, a pull-up control signal, and a pull-down control signal; a driving control circuit configured to generate the pull-up control signal and the pull-down control signal according to one or more calibration signals and the multi-bit data signals or according to the calibration signals and one or more duplicate multi-bit data signals, the duplicate multi-bit data signals duplicating the multi-bit data signals; and a look-up table storing values of the calibration signals.

2. 发明授权

US10348538B2 Transmitter performing an equalizing operation 有权
公开(公告)号：US10348538B2
公开(公告)日：2019-07-09
申请号：US16000536
申请日：2018-06-05
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Hyeongjun Ko , Mino Kim , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H04L27/01 , H04L25/02 , H04L25/497 , H04L25/03
摘要： A transmitter may include a driver having a PMOS transistor and an NMOS transistor connected in series between a first power supply and a second power supply. The driver may be configured to output an output signal. The transmitter may further include a driver control circuit configured to control a gate voltage of the PMOS transistor and a gate voltage of the NMOS transistor based on a level of a data signal, an occurrence of a level transition of the data signal, and a direction of the level transition of the data signal.

3. 发明授权

US10263604B2 Triangular wave generator 有权
公开(公告)号：US10263604B2
公开(公告)日：2019-04-16
申请号：US15590864
申请日：2017-05-09
申请人： SK Hynix Inc. , Seoul National University R&DB FOUNDATION
发明人： Joohyung Chae , Hankyu Chi , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H03K4/06 , H03K4/501 , H03K5/1534
摘要： A triangular wave generator includes a wave generator configured to generate a triangular wave according to a clock signal and a control signal. The triangular wave generator further includes a wave controller configured to adjust a value of the control signal in a correction mode. The control signal includes a first bias control signal, a second bias control signal, and a capacitance control signal.

4. 发明授权

US09071232B2 Integrated circuit with ring oscillator 有权
标题翻译：集成电路与环形振荡器
公开(公告)号：US09071232B2
公开(公告)日：2015-06-30
申请号：US13906013
申请日：2013-05-30
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Kwan-Dong Kim , Suhwan Kim , Gi-Moon Hong
IPC分类号： H03K3/03 , H03L7/085 , H03L7/099 , H03L7/087
CPC分类号： H03K3/0322 , H03L7/087 , H03L7/0995
摘要： An integrated circuit includes a ring oscillator including delay cells having a delay value and configured to generate two or more periodic waves, a first phase controller configured to compare the phase of a first selected periodic wave to the phase of a reference wave and change the delay value of the delay cells from a first delay value to a second delay value based on a first comparison signal corresponding to a phase difference between the first selected periodic wave and the reference wave, and a second phase controller configured to compare the phase of a second selected periodic wave to the phase of the reference wave and restore the delay value of the delay cells from the second delay value to the first delay value based on a second comparison signal corresponding to a phase difference between the second selected periodic wave and the reference wave.
摘要翻译：集成电路包括环形振荡器，其包括具有延迟值并被配置为产生两个或多个周期波的延迟单元;第一相位控制器，被配置为将第一选定周期波的相位与参考波的相位进行比较，并改变延迟基于与第一选定周期波和参考波之间的相位差对应的第一比较信号，将延迟单元的值从第一延迟值延迟到第二延迟值;以及第二相位控制器，被配置为将第二延迟单元选择的周期波到参考波的相位，并且基于对应于第二选定周期波和参考波之间的相位差的第二比较信号，将延迟单元的延迟值从第二延迟值恢复到第一延迟值。

5. 发明授权

US11271549B2 Semiconductor device for controlling voltage at an input node of a circuit during a low power mode 有权
公开(公告)号：US11271549B2
公开(公告)日：2022-03-08
申请号：US17097943
申请日：2020-11-13
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Shin Hyun Jeong , Suhwan Kim , Gi Moon Hong , Ji Hyo Kang , Jae Hyeok Yang , Dae Han Kwon , Dong Hyun Kim
IPC分类号： H03K3/012 , H03K3/037
摘要： A semiconductor device includes a circuit including an input coupled to a first node; and a first signal control circuit configured to determine a voltage of the first node in a low power mode, wherein the first signal control circuit sets a voltage of the first node to a first value in an n-th occurrence of the low power mode and a second value different from the first value in an m-th occurrence of the low power mode, and wherein n and m are two different natural numbers.

6. 发明授权

US10693436B2 Impedance adjusting circuit and integrated circuit including the same 有权
公开(公告)号：US10693436B2
公开(公告)日：2020-06-23
申请号：US15965545
申请日：2018-04-27
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Suhwan Kim , Joo-Hyung Chae , Deog-Kyoon Jeong
IPC分类号： H03H7/40 , H03H11/30 , H03H17/00 , H03K19/00
摘要： An impedance adjusting circuit includes: a first node coupled to a resistor; a first impedance unit having an impedance value determined based on a first impedance code and coupled between a first voltage terminal and a second node; a first switching unit suitable for electrically connecting the first node and the second node to each other in response to a clock; a first average voltage unit suitable for generating an average voltage of the first node; a first comparison unit suitable for comparing the average voltage of the first node with a first reference voltage to produce a comparison result of the first comparison unit; and a first code generation unit suitable for generating the first impedance code in response to the comparison result of the first comparison unit.

7. 发明授权

US10574219B2 Unit delay circuit and digitally controlled delay line including the same 有权
公开(公告)号：US10574219B2
公开(公告)日：2020-02-25
申请号：US16000448
申请日：2018-06-05
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Mino Kim , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H03K5/133 , H03H11/26
摘要： In an embodiment, a unit delay circuit comprises a first path configured to delay a first input signal to output a first output signal when a selection signal is inactivated, a second path configured delay a second input signal to output a second output signal when the selection signal is inactivated, and a third path configured to delay the first input signal to output the second output signal when the selection signal is activated.

8. 发明授权

US10044359B1 Injection locked phase locked loop 有权
公开(公告)号：US10044359B1
公开(公告)日：2018-08-07
申请号：US15701333
申请日：2017-09-11
申请人： SK hynix Inc. , Seoul National University R&DB FOUNDATION
发明人： Sungwoo Kim , Han-Gon Ko , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H03L7/099 , H03L7/091 , H03L7/18
摘要： An injection locked phase locked loop includes an injection locked oscillator configured to generate an oscillation signal according to an injection signal and to generate a replica signal by replicating the oscillation signal when the injection signal is deactivated; a phase controller configured to generate a phase control signal according to a phase error signal; and an error detector configured to generate the phase error signal by comparing a phase of the oscillation signal and a phase of the replica signal, and to control a phase difference between the oscillation signal and the replica signal according to the phase control signal.

9. 发明授权

US09369265B1 Data receiver 有权
标题翻译：数据接收器
公开(公告)号：US09369265B1
公开(公告)日：2016-06-14
申请号：US14882784
申请日：2015-10-14
申请人： SK hynix Inc. , SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
发明人： Gi-Moon Hong , Suhwan Kim , Deog-Kyoon Jeong
IPC分类号： H04L7/00 , H04L7/02 , H04L7/033 , H03L7/089 , H03L7/087 , H04L7/04
CPC分类号： H04L7/0079 , H03L7/0812 , H03L7/087 , H03L7/0891 , H03L7/0896 , H04L7/0008 , H04L7/0012 , H04L7/0037 , H04L7/02 , H04L7/0337 , H04L7/04
摘要： A data receiver includes a sampling clock generator configured to generate a sampling clock signal from an internal clock signal according to a data strobe signal, and a sampler configured to sample a data signal according to the sampling clock signal.
摘要翻译：数据接收机包括：采样时钟发生器，被配置为根据数据选通信号从内部时钟信号产生采样时钟信号;以及采样器，被配置为根据采样时钟信号对数据信号进行采样。

10. 发明授权

US11088676B1 Calibration circuit and transmitter including the same 有权
公开(公告)号：US11088676B1
公开(公告)日：2021-08-10
申请号：US17166697
申请日：2021-02-03
申请人： SK hynix Inc. , Seoul National University R&DB Foundation
发明人： Sangyoon Lee , Jaekwang Yun , Suhwan Kim
IPC分类号： H03K3/012 , H03K5/24 , H03K21/02
摘要： A calibration circuit includes an oscillator configured to generate an oscillation signal according to a control voltage; a counter configured to generate a count value according to the oscillation signal; and a control circuit configured to control a pull-up driver and a pull-down driver commonly coupled to an output node according to the count value, wherein the control circuit compares a reference count value of the counter by providing a reference voltage as the control voltage for a unit control period with a count value of the counter by providing an output voltage of the output node as the control voltage for a unit control period, and controls a pull-up control signal that adjusts turn-on impedance of the pull-up driver and a pull-down control signal that adjusts turn-on impedance of the pull-down driver.

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