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1. 发明授权

US09502579B2 Thin film transistor substrate 有权
标题翻译：薄膜晶体管基板
公开(公告)号：US09502579B2
公开(公告)日：2016-11-22
申请号：US14717734
申请日：2015-05-20
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Bong-Kyun Kim , Seung-Ho Yoon , Shin-Il Choi
IPC分类号： H01L29/12 , H01L29/786 , H01L29/417 , H01L27/12 , H01L23/532 , H01L29/66
CPC分类号： H01L29/7869 , H01L21/441 , H01L21/465 , H01L21/47635 , H01L23/53228 , H01L23/53238 , H01L27/124 , H01L27/1259 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L2924/0002 , H01L2924/00
摘要： A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer disposed on the substrate that partially overlaps the gate electrode and includes an oxide semiconductor material; and a source electrode and a drain electrode disposed on the semiconductor layer, where the drain electrode is spaced apart from the source electrode. The source electrode and the drain electrode each include a barrier layer and a main wiring layer, the a main wiring layer is disposed on the barrier layer, and the barrier layer includes a first metal layer disposed on the semiconductor layer, and a second metal layer disposed on the first metal layer.
摘要翻译：薄膜晶体管基板包括设置在基板上的栅电极; 半导体层，其设置在与所述栅电极部分重叠并且包括氧化物半导体材料的所述基板上; 以及设置在半导体层上的源电极和漏电极，其中漏电极与源电极间隔开。源电极和漏极各自包括阻挡层和主布线层，主布线层设置在阻挡层上，阻挡层包括设置在半导体层上的第一金属层和第二金属层设置在第一金属层上。

2. 发明授权

US09406630B2 Contact portion of wire and manufacturing method thereof 有权
公开(公告)号：US09406630B2
公开(公告)日：2016-08-02
申请号：US14579542
申请日：2014-12-22
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Joo-Han Kim , Ki-Yong Song , Dong-Ju Yang , Hee-Joon Kim , Yeo-Geon Yoon , Sung-Hen Cho , Chang-Hoon Kim , Jae-Hong Kim , Yu-Gwang Jeong , Ki-Yeup Lee , Sang-Gab Kim , Yun-Jong Yeo , Shin-Il Choi , Ji-Young Park
IPC分类号： H01L23/00 , G02F1/1362 , H01L27/12
CPC分类号： H01L24/05 , G02F1/136227 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L2224/04042 , H01L2924/14 , H01L2924/1426 , H01L2924/00
摘要： A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

3. 发明申请

US20150070643A1 DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US20150070643A1
公开(公告)日：2015-03-12
申请号：US14195051
申请日：2014-03-03
申请人： Samsung Display Co., Ltd.
发明人： Jae-Neung Kim , Yu-Gwang Jeong , Sang-Gab Kim , Su-Bin Bae , Shin-Il Choi
IPC分类号： H01L27/12 , G02F1/1343
CPC分类号： H01L27/1225 , G02F1/134309 , G02F1/136213 , G02F2201/50 , H01L27/1248 , H01L27/1255 , H01L27/1259
摘要： A display apparatus includes: a substrate defining transistor and wiring areas; a thin film transistor in the transistor area and including a gate electrode, an active layer, and source and drain electrodes; an etch prevention layer in the transistor area, absent in the wiring area and covering the active layer, and first and second contact holes defined in the etch prevention layer and through which the active layer is electrically coupled to the source and drain electrodes; a first wiring layer in the wiring area; a first insulating layer which covers the gate electrode and the first wiring layer, and a third contact hole defined in the first insulating layer in the wiring area and exposing the first wiring layer; and a second wiring layer on the first insulating layer and in the wiring area, and electrically coupled to the first wiring layer via the third contact hole.
摘要翻译：显示装置包括：限定晶体管和布线区域的基板; 晶体管区域中的薄膜晶体管，并且包括栅电极，有源层以及源极和漏极; 晶体管区域中的防蚀层，在布线区域中不存在并覆盖有源层，以及限定在防蚀层中的第一和第二接触孔，有源层电耦合到源电极和漏电极; 布线区域中的第一布线层; 覆盖所述栅电极和所述第一布线层的第一绝缘层和限定在所述布线区域中的所述第一绝缘层中的第三接触孔，并暴露所述第一布线层; 以及在所述第一绝缘层和所述布线区域中的第二布线层，并且经由所述第三接触孔电耦合到所述第一布线层。

4. 发明授权

US10720501B2 Display substrate capable of decreasing defects and the method of the same 有权
公开(公告)号：US10720501B2
公开(公告)日：2020-07-21
申请号：US16563948
申请日：2019-09-09
申请人： Samsung Display Co., Ltd.
发明人： Yu-Gwang Jeong , Shin-Il Choi , Su-Bin Bae , Sung-Hoon Yang
IPC分类号： H01L29/417 , H01L27/12 , H01L29/45 , H01L29/66 , H01L23/532
摘要： According to an exemplary embodiment, a display substrate includes a gate metal pattern comprising a gate electrode, an active pattern disposed on the gate pattern and a source metal pattern disposed on the active pattern. The source metal pattern includes a first lower pattern disposed on the active pattern, a second lower pattern disposed on the first lower pattern, a low-resistance metal pattern disposed on the second lower pattern, and an upper pattern disposed on the low-resistance metal pattern. The first lower pattern, the second lower pattern, and the upper pattern each include a material that is the same.

5. 发明授权

US09837550B2 Thin film transistor substrate and method of fabricating the same 有权
公开(公告)号：US09837550B2
公开(公告)日：2017-12-05
申请号：US15335897
申请日：2016-10-27
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Bong-Kyun Kim , Seung-Ho Yoon , Shin-Il Choi
IPC分类号： H01L29/12 , H01L29/786 , H01L29/417 , H01L27/12 , H01L29/66 , H01L23/532 , H01L21/465 , H01L21/4763 , H01L21/441 , H01L29/45
CPC分类号： H01L29/7869 , H01L21/441 , H01L21/465 , H01L21/47635 , H01L23/53228 , H01L23/53238 , H01L27/124 , H01L27/1259 , H01L29/41733 , H01L29/45 , H01L29/66969 , H01L2924/0002 , H01L2924/00
摘要： A thin film transistor substrate includes a gate electrode disposed on a substrate; a semiconductor layer disposed on the substrate that partially overlaps the gate electrode and includes an oxide semiconductor material; and a source electrode and a drain electrode disposed on the semiconductor layer, where the drain electrode is spaced apart from the source electrode. The source electrode and the drain electrode each include a barrier layer and a main wiring layer, the a main wiring layer is disposed on the barrier layer, and the barrier layer includes a first metal layer disposed on the semiconductor layer, and a second metal layer disposed on the first metal layer.

6. 发明授权

US09443881B2 Thin film transistor substrate and the method thereof 有权
标题翻译：薄膜晶体管基板及其制造方法
公开(公告)号：US09443881B2
公开(公告)日：2016-09-13
申请号：US14518278
申请日：2014-10-20
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Jean-Ho Song , Shin-Il Choi , Sun-Young Hong , Shi-Yul Kim , Ki-Yeup Lee , Jae-Hyoung Youn , Sung-Ryul Kim , O-Sung Seo , Yang-Ho Bae , Jong-Hyun Choung , Dong-Ju Yang , Bong-Kyun Kim , Hwa-Yeul Oh , Pil-Soon Hong , Byeong-Beom Kim , Je-Hyeong Park , Yu-Gwang Jeong , Jong-In Kim , Nam-Seok Suh
IPC分类号： H01L29/04 , H01L27/12 , H01L29/423 , H01L29/45 , H01L29/786
CPC分类号： H01L27/124 , H01L27/12 , H01L27/1214 , H01L27/1288 , H01L29/42368 , H01L29/458 , H01L29/78669
摘要： A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.
摘要翻译：薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。栅极绝缘层可以具有台阶形状。

7. 发明授权

US09236401B2 Display apparatus and method of manufacturing the same 有权
标题翻译：显示装置及其制造方法
公开(公告)号：US09236401B2
公开(公告)日：2016-01-12
申请号：US14195051
申请日：2014-03-03
申请人： Samsung Display Co., Ltd.
发明人： Jae-Neung Kim , Yu-Gwang Jeong , Sang-Gab Kim , Su-Bin Bae , Shin-Il Choi
IPC分类号： G02F1/1343 , G02F1/1362 , H01L27/12
CPC分类号： H01L27/1225 , G02F1/134309 , G02F1/136213 , G02F2201/50 , H01L27/1248 , H01L27/1255 , H01L27/1259
摘要： A display apparatus includes: a substrate defining transistor and wiring areas; a thin film transistor in the transistor area and including a gate electrode, an active layer, and source and drain electrodes; an etch prevention layer in the transistor area, absent in the wiring area and covering the active layer, and first and second contact holes defined in the etch prevention layer and through which the active layer is electrically coupled to the source and drain electrodes; a first wiring layer in the wiring area; a first insulating layer which covers the gate electrode and the first wiring layer, and a third contact hole defined in the first insulating layer in the wiring area and exposing the first wiring layer; and a second wiring layer on the first insulating layer and in the wiring area, and electrically coupled to the first wiring layer via the third contact hole.
摘要翻译：显示装置包括：限定晶体管和布线区域的基板; 晶体管区域中的薄膜晶体管，并且包括栅电极，有源层以及源极和漏极; 晶体管区域中的防蚀层，在布线区域中不存在并覆盖有源层，以及限定在防蚀层中的第一和第二接触孔，有源层电耦合到源电极和漏电极; 布线区域中的第一布线层; 覆盖所述栅电极和所述第一布线层的第一绝缘层和限定在所述布线区域中的所述第一绝缘层中的第三接触孔，并暴露所述第一布线层; 以及在所述第一绝缘层和所述布线区域中的第二布线层，并且经由所述第三接触孔电耦合到所述第一布线层。

8. 发明授权

US09064750B2 Display substrate and method of manufacturing the same 有权
标题翻译：显示基板及其制造方法
公开(公告)号：US09064750B2
公开(公告)日：2015-06-23
申请号：US13869697
申请日：2013-04-24
申请人： Samsung Display Co., LTD.
发明人： Yu-Gwang Jeong , Ji-Young Park , Shin-Il Choi , Sang-Gab Kim
IPC分类号： H01L29/786 , H01L27/13 , G02F1/1345 , H01L27/12 , G02F1/1337 , H01L33/02
CPC分类号： H01L27/124 , G02F1/133707 , H01L27/1248 , H01L27/1288
摘要： A method of manufacturing a display substrate includes forming a gate insulation layer on the base substrate on which a gate metal pattern, forming a data metal pattern on the gate insulation layer, sequentially forming a insulation layer and an organic layer on the base substrate on which the data metal pattern is formed, partially exposing the organic layer, developing the organic layer to partially remove the organic layer on the data metal pattern and to expose at least a portion of the protecting layer on the gate metal pattern, forming a common electrode on the organic layer, forming a pixel electrode on the on the organic layer, and forming an insulation layer between the pixel electrode and the common electrode. An etching degree of a data metal may be controlled by controlling a thickness of a remained organic layer to reduce a damage of the data metal.
摘要翻译：一种制造显示基板的方法包括在基底基板上形成栅极绝缘层，栅基金属图案在栅绝缘层上形成数据金属图案，在基底基板上依次形成绝缘层和有机层，形成数据金属图案，部分地暴露有机层，显影有机层以部分地去除数据金属图案上的有机层，并暴露栅极金属图案上的保护层的至少一部分，形成公共电极有机层，在有机层上形成像素电极，在像素电极和公共电极之间形成绝缘层。可以通过控制剩余的有机层的厚度来减少数据金属的损伤来控制数据金属的蚀刻程度。

9. 发明申请

US20150053984A1 THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管基板及其方法
公开(公告)号：US20150053984A1
公开(公告)日：2015-02-26
申请号：US14518278
申请日：2014-10-20
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： JEAN-HO SONG , Shin-Il Choi , Sun-Young Hong , Shi-Yul Kim , Ki-Yeup Lee , Jae-Hyoung Youn , Sung-Ryul Kim , O-Sung Seo , Yang-Ho Bae , Jong-Hyun Choung , Dong-Ju Yang , Bong-Kyun Kim , Hwa-Yeul Oh , Pil-Soon Hong , Byeong-Beom Kim , Je-Hyeong Park , Yu-Gwang Jeong , Jong-In Kim , Nam-Seok Suh
IPC分类号： H01L27/12 , H01L29/45 , H01L29/423 , H01L29/786
CPC分类号： H01L27/124 , H01L27/12 , H01L27/1214 , H01L27/1288 , H01L29/42368 , H01L29/458 , H01L29/78669
摘要： A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape.
摘要翻译：薄膜晶体管阵列面板包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线和漏极，钝化层覆盖数据线和漏电极，并且具有露出漏电极的一部分的接触孔，以及通过接触孔与漏电极电连接的像素电极。数据线和漏极各自具有包括钛的下层和铜的上层的双层，下层比上层宽，下层具有暴露的区域。栅极绝缘层可以具有台阶形状。

10. 发明授权

US10446587B2 Display substrate comprising a plurality of conductive patterns 有权
公开(公告)号：US10446587B2
公开(公告)日：2019-10-15
申请号：US15594325
申请日：2017-05-12
申请人： SAMSUNG DISPLAY CO., LTD.
发明人： Ji-Sun Kim , Ji-Hyun Kim , Shin-Il Choi , Yeong-Keun Kwon
IPC分类号： H01L27/12
摘要： A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

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