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    • 10. 发明授权
    • Thin film transistor array panel
    • 薄膜晶体管阵列面板
    • US09466682B2
    • 2016-10-11
    • US14741042
    • 2015-06-16
    • Samsung Display Co., Ltd.
    • Yun Hee Kwak
    • H01L27/00H01L29/00H01L29/423H01L27/12H01L29/417
    • H01L29/42384H01L27/1222H01L27/124H01L29/41733
    • A thin film transistor array panel is capable of increasing an aperture ratio and decreasing parasitic capacitance between a gate electrode and a drain electrode by reducing an area of a thin film transistor. The thin film transistor array panel includes: a substrate; a gate line disposed on the substrate and including a gate electrode; a gate insulating layer on the gate line; a semiconductive island on the gate insulating layer; a circular drain electrode on the semiconductive island; and a source electrode disposed on the semiconductive island and shaped like a circular band bent in a direction from which the drain electrode is disposed. The gate electrode may include a circular portion that is overlapped by the drain electrode and a circular sector portion that is overlapped by the source electrode.
    • 通过减小薄膜晶体管的面积,薄膜晶体管阵列面板能够增加开口率并降低栅电极和漏电极之间的寄生电容。 薄膜晶体管阵列面板包括:基板; 栅极线,设置在所述基板上并且包括栅电极; 栅极线上的栅极绝缘层; 栅极绝缘层上的半导体岛; 半导体岛上的圆形漏电极; 以及源电极,设置在半导体岛上并且形成为沿着设置漏电极的方向弯曲的圆形带。 栅电极可以包括与漏电极重叠的圆形部分和与源电极重叠的圆形扇形部分。