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1. 发明授权

US11552392B2 Electronic device including antenna module 有权
公开(公告)号：US11552392B2
公开(公告)日：2023-01-10
申请号：US16571544
申请日：2019-09-16
申请人： Samsung Electronics Co., Ltd.
发明人： Sangmin Jung , Geunwoo Kim
IPC分类号： H01Q1/52 , H04W76/10 , G06F13/38 , H04W88/04 , H04W36/00
摘要： An electronic device comprises a plurality of antennas, wherein each of the plurality of antennas are spaced apart from each other, a first communication circuit electrically connected with the plurality of antennas, a plurality of array antennas comprising a first array antenna disposed adjacent to at least one of the plurality of antennas, and a second array antenna disposed adjacent to another antenna different from the at least one antenna of the plurality of antennas, a second communication circuit electrically connected with the first array antenna and the second array antenna, and at least one control circuit electrically connected with the first communication circuit and the second communication circuit, wherein the at least one control circuit is configured to obtain receive sensitivities of the plurality of antennas through the first communication circuit; activate at least one array antenna of the first array antenna and the second array antenna through the second communication circuit based at least on the receive sensitivities; and control the activated at least one array antenna to form at least one beam for communication with an external electronic device.

2. 发明申请

US20200176317A1 METHODS OF FABRICATING SEMICONDUCTOR DEVICES INCLUDING DIFFERING BARRIER LAYER STRUCTURES 审中-公开
公开(公告)号：US20200176317A1
公开(公告)日：2020-06-04
申请号：US16785236
申请日：2020-02-07
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Namgyu CHO , Kughwan Kim , Geunwoo Kim , Jungmin Park , Minwoo Song
IPC分类号： H01L21/8234 , H01L29/40 , H01L21/3213 , H01L29/66
摘要： A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

3. 发明申请

US20230135806A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
公开(公告)号：US20230135806A1
公开(公告)日：2023-05-04
申请号：US17821033
申请日：2022-08-19
申请人： Samsung Electronics Co., Ltd.
发明人： Sunghwan Kim , Geunwoo Kim , Wandon Kim , Yoon Tae Hwang
IPC分类号： H01L29/45 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/417 , H01L29/786 , H01L29/775 , H01L21/02 , H01L21/8238 , H01L29/40 , H01L29/66
摘要： A semiconductor device includes a substrate including an active pattern, a channel pattern and a source/drain pattern that are on the active pattern and connected to each other, and an active contact electrically connected to the source/drain pattern. The active contact includes a first barrier metal and a first filler metal on the first barrier metal, and the first barrier metal includes a metal nitride layer. The first filler metal includes at least one of molybdenum, tungsten, ruthenium, cobalt, or vanadium. The first filler metal includes a first crystalline region having a body-centered cubic (BCC) structure and a second crystalline region having a face-centered cubic (FCC) structure. A proportion of the first crystalline region in the first filler metal ranges from 60% to 99%.

4. 发明授权

US11417656B2 Semiconductor device 有权
公开(公告)号：US11417656B2
公开(公告)日：2022-08-16
申请号：US16898719
申请日：2020-06-11
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Yoon Tae Hwang , Sunjung Lee , Heonbok Lee , Geunwoo Kim , Wandon Kim
IPC分类号： H01L27/092 , H01L21/8238
摘要： A semiconductor device includes a first and second channel patterns on a substrate, each of the first and second channel patterns including vertically-stacked semiconductor patterns; a first source/drain pattern connected to the first channel pattern; a second source/drain pattern connected to the second channel pattern, the first and second source/drain patterns having different conductivity types from each other; a first contact plug inserted in the first source/drain pattern, and a second contact plug inserted in the second source/drain pattern; a first interface layer interposed between the first source/drain pattern and the first contact plug; and a second interface layer interposed between the second source/drain pattern and the second contact plug, the first and second interface layers including different metallic elements from each other, a bottom portion of the second interface layer being positioned at a level that is lower than a bottom surface of a topmost one of the semiconductor patterns.

5. 发明授权

US10804158B2 Methods of fabricating semiconductor devices including differing barrier layer structures 有权
公开(公告)号：US10804158B2
公开(公告)日：2020-10-13
申请号：US16785236
申请日：2020-02-07
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Namgyu Cho , Kughwan Kim , Geunwoo Kim , Jungmin Park , Minwoo Song
IPC分类号： H01L21/82 , H01L29/40 , H01L29/66 , H01L21/8234 , H01L21/3213
摘要： A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

6. 发明授权

US11631769B2 Semiconductor device 有权
公开(公告)号：US11631769B2
公开(公告)日：2023-04-18
申请号：US17321960
申请日：2021-05-17
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Geunwoo Kim , Wandon Kim , Heonbok Lee , Yoontae Hwang
IPC分类号： H01L29/78 , H01L29/417
摘要： A semiconductor device includes: a fin-type active region extending on a substrate in a first direction; a gate structure extending across the fin-type active region in a second direction, different from the first direction; a source/drain region in the fin-type active region on one side of the gate structure; and first and second contact structures connected to the source/drain region and the gate structure, respectively, wherein at least one of the first and second contact structures includes a seeding layer on at least one of the gate structure and the source/drain region and including a first crystalline metal, and a contact plug on the seeding layer and including a second crystalline metal different from the first crystalline metal, and the second crystalline metal is substantially lattice-matched to the first crystalline metal at an interface between the seeding layer and the contact plug.

7. 发明授权

US11239334B2 Semiconductor device 有权
公开(公告)号：US11239334B2
公开(公告)日：2022-02-01
申请号：US16811605
申请日：2020-03-06
申请人： Samsung Electronics Co., Ltd.
发明人： Yoon Tae Hwang , Wandon Kim , Geunwoo Kim
IPC分类号： H01L29/417 , H01L21/768 , H01L23/532 , H01L29/08 , H01L21/285 , H01L29/45 , H01L29/78
摘要： A semiconductor device including a lower contact pattern including a first metal, an upper contact pattern including a second metal, a first resistivity of first metal being greater than a second resistivity of the second metal, and a metal barrier layer between the lower contact pattern and a lower portion of the upper contact pattern, the metal barrier layer including a third metal, the third metal being different from the first and second metals may be provided. A lower width of the upper contact pattern may be less than an upper width of the lower contact pattern.

8. 发明申请

US20210057533A1 SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20210057533A1
公开(公告)日：2021-02-25
申请号：US16811605
申请日：2020-03-06
申请人： Samsung Electronics Co., Ltd.
发明人： Yoon Tae HWANG , Wandon Kim , Geunwoo Kim
IPC分类号： H01L29/417 , H01L21/768 , H01L23/532 , H01L29/45 , H01L29/08 , H01L21/285
摘要： A semiconductor device including a lower contact pattern including a first metal, an upper contact pattern including a second metal, a first resistivity of first metal being greater than a second resistivity of the second metal, and a metal barrier layer between the lower contact pattern and a lower portion of the upper contact pattern, the metal barrier layer including a third metal, the third metal being different from the first and second metals may be provided. A lower width of the upper contact pattern may be less than an upper width of the lower contact pattern.

9. 发明授权

US10593597B2 Methods of fabricating semiconductor devices including differing barrier layer structures 有权
公开(公告)号：US10593597B2
公开(公告)日：2020-03-17
申请号：US16185213
申请日：2018-11-09
申请人： Samsung Electronics Co., Ltd.
发明人： Namgyu Cho , Kughwan Kim , Geunwoo Kim , Jungmin Park , Minwoo Song
IPC分类号： H01L21/82 , H01L29/40 , H01L29/66 , H01L21/8234 , H01L21/3213
摘要： A method of fabricating a semiconductor device may include forming a first conductive layer on first to third regions of a substrate, forming a barrier layer on the first conductive layer, the barrier layer including a first barrier layer, a second barrier layer, and a sacrificial layer which are sequentially formed, sequentially forming a second conductive layer and a third conductive layer on the barrier layer, performing a first etching process to remove the third conductive layer from the second region and the third region, the third conductive layer remaining on the first region after the first etching process, and performing a second etching process to remove the second conductive layer and the sacrificial layer from the third region, the second conductive layer and the sacrificial layer remaining on the first region and on the second region after the second etching process.

10. 发明授权

US11538916B2 Semiconductor device 有权
公开(公告)号：US11538916B2
公开(公告)日：2022-12-27
申请号：US17231126
申请日：2021-04-15
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Yoontae Hwang , Wandon Kim , Geunwoo Kim , Heonbok Lee , Taegon Kim , Hanki Lee
IPC分类号： H01L29/45 , H01L29/78 , H01L29/417 , H01L23/532 , H01L23/485 , H01L23/522 , H01L29/66 , H01L21/285 , H01L29/08
摘要： A semiconductor device including a substrate; a fin active region on the substrate and extending in a first direction; a gate structure extending across the fin active region and extending in a second direction; a source/drain region in the fin active region on a side of the gate structure; an insulating structure covering the gate structure and the source/drain region; and contact structures penetrating through the insulating structure and respectively connected to the source/drain region and the gate structure, wherein one of the contact structures includes a seed layer on the gate structure or the source/drain regions and including lower and upper regions, the lower region having a first grain size and the upper region being amorphous or having a grain size different from the first grain size, and a contact plug on an upper region of the seed layer and having a second grain size.

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