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1. 发明授权

US11476419B2 Method for manufacturing a semiconductor device including a low-k dielectric material layer 有权
公开(公告)号：US11476419B2
公开(公告)日：2022-10-18
申请号：US16874781
申请日：2020-05-15
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Youngmin Ko , Jonguk Kim , Jaeho Jung , Dongsung Choi
IPC分类号： H01L45/00 , H01L27/24 , C08G77/20 , H01L21/02 , B05D1/00 , B05D3/04 , B05D3/10
摘要： A method for manufacturing a semiconductor device includes forming a first pattern structure having a first opening on a lower structure comprising a semiconductor substrate. The first pattern structure includes a stacked pattern and a first spacer layer covering at least a side surface of the stacked pattern. A first flowable material layer including a SiOCH material is formed on the first spacer layer to fill the first opening and cover an upper portion of the first pattern structure. A first curing process including supplying a gaseous ammonia catalyst into the first flowable material layer is performed on the first flowable material layer to form a first cured material layer that includes water. A second curing process is performed on the first cured material layer to form a first low-k dielectric material layer. The first low-k dielectric material layer is planarized to form a planarized first low-k dielectric material layer.

2. 发明授权

US11411179B2 Variable resistance memory device and method of fabricating the same 有权
公开(公告)号：US11411179B2
公开(公告)日：2022-08-09
申请号：US16933123
申请日：2020-07-20
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jaeho Jung , Kwangmin Park , Jonguk Kim , Dongsung Choi
IPC分类号： H01L45/00 , H01L27/24
摘要： A method of fabricating a variable resistance memory device that includes forming a plurality of memory cells on a substrate. Each of the plurality of memory cells in a switching device and a variable resistance pattern. A capping structure is formed that commonly covers lateral side surfaces of the plurality of memory cells. An insulating gapfill layer is formed that covers the capping structure and fills a region between adjacent memory cells of the plurality of memory cells. The forming of the capping structure includes forming a second capping layer including silicon oxide that covers the lateral side surfaces of the plurality of memory cells. At least a partial portion of the second capping layer is nitrided by performing a first decoupled plasma process to form a third capping layer that includes silicon oxynitride.

3. 发明授权

US11600776B2 Apparatus for and method of fabricating semiconductor device 有权
公开(公告)号：US11600776B2
公开(公告)日：2023-03-07
申请号：US17033460
申请日：2020-09-25
申请人： Samsung Electronics Co., Ltd.
发明人： Jaeho Jung , Kyoung Sun Kim , Jeonghee Park , Jiho Park , Changyup Park
IPC分类号： H01L45/00 , H01J37/32 , H01J37/34 , H01L27/24
摘要： An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.

4. 发明授权

US11063218B2 Method of fabricating semiconductor devices using a two-step gap-fill process 有权
公开(公告)号：US11063218B2
公开(公告)日：2021-07-13
申请号：US16746258
申请日：2020-01-17
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jaeho Jung , Youngmin Ko , Jonguk Kim , Kwangmin Park , Dongsung Choi
IPC分类号： H01L21/00 , H01L45/00 , H01L27/24
摘要： A method of fabricating a memory device includes forming word lines and cell stacks with gaps between the cell stacks, forming a lower gap-fill insulator in the gaps, forming an upper gap-fill insulator on the lower gap-fill insulator, curing the lower gap-fill insulator and the upper gap-fill insulator to form a gap-fill insulator, and forming bit lines on the cell stacks and the gap-fill insulator. The lower gap-fill process may be performed using a first source gas that includes first and second precursors, and the upper gap-fill process may be performed using a second source gas that includes the first and second precursors, a volume ratio of the first precursor to the second precursor in the first source gas may be greater than 15:1, and a volume ratio of the first precursor to the second precursor in the second source gas may be less than 15:1.

5. 发明授权

US10818839B2 Apparatus for and method of fabricating semiconductor devices 有权
公开(公告)号：US10818839B2
公开(公告)日：2020-10-27
申请号：US16149507
申请日：2018-10-02
申请人： Samsung Electronics Co., Ltd.
发明人： Jaeho Jung , Kyoung Sun Kim , Jeonghee Park , Jiho Park , Changyup Park
IPC分类号： H01L45/00 , H01J37/32 , H01J37/34 , H01L27/24
摘要： An apparatus of fabricating a semiconductor device may include a chamber including a housing and a slit valve used to open or close a portion of the housing, a heater chuck provided in a lower region of the housing and used to heat a substrate, a target provided over the heater chuck, a plasma electrode provided in an upper region of the housing and used to generate plasma on the target, a heat-dissipation shield surrounding the inner wall of the housing between the plasma electrode and the heater chuck, and an edge heating structure provided between the heat-dissipation shield and the inner wall of the housing and configured to heat the heat-dissipation shield and an edge region of the substrate and to reduce a difference in temperature between center and edge regions of the substrate.

6. 发明授权

US10930848B2 Variable resistance memory device and method of manufacturing the same 有权
公开(公告)号：US10930848B2
公开(公告)日：2021-02-23
申请号：US16415424
申请日：2019-05-17
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Byongju Kim , Young-Min Ko , Jonguk Kim , Jaeho Jung , Dongsung Choi
IPC分类号： H01L45/00 , H01L21/02
摘要： A method of manufacturing a variable resistance memory device includes: forming an array of memory cells on a substrate, each memory cell including a variable resistance structure and a switching element; and forming a sidewall insulating layer covering a sidewall of the switching element. The forming the sidewall insulating layer includes: a preliminary step of supplying a silicon source to an exposed sidewall of the switching element; and a main step of performing a process cycle a plurality of times, the process cycle comprising supplying the silicon source and supplying a reaction gas, A time duration of the supplying the silicon source in the preliminary step is longer than a time duration of the supplying the silicon gas in the process cycle in the main step.

7. 发明授权

US10566530B2 Method of fabricating semiconductor devices 有权
公开(公告)号：US10566530B2
公开(公告)日：2020-02-18
申请号：US16170108
申请日：2018-10-25
申请人： Samsung Electronics Co., Ltd.
发明人： Changyup Park , Jeonghee Park , Jaeho Jung
IPC分类号： H01L45/00 , H01L27/24
摘要： Disclosed is a method of fabricating a semiconductor device. The method may include forming a mold layer on a substrate, the mold layer having a hole exposing a portion of the substrate, forming a phase transition layer with a void, in the hole, and thermally treating the phase transition layer to remove the void from the phase transition layer. The thermal treating of the phase transition layer may include heating the substrate to a first temperature to form a diffusion layer in the phase transition layer, and the first temperature may be lower than or equal to 55% of a melting point of the phase transition layer.

8. 发明授权

US11456414B2 Variable resistance memory device and method of manufacturing the same 有权
公开(公告)号：US11456414B2
公开(公告)日：2022-09-27
申请号：US16416472
申请日：2019-05-20
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jonguk Kim , Young-Min Ko , Byongju Kim , Jaeho Jung , Dongsung Choi
IPC分类号： H01L27/24 , H01L45/00
摘要： A method of manufacturing a variable resistance memory device may include: forming a memory cell including a variable resistance pattern on a substrate; performing a first process to deposit a first protective layer covering the memory cell; and performing a second process to deposit a second protective layer on the first protective layer. The first process and the second process may use the same source material and the same nitrogen reaction material, and a nitrogen content in the first protective layer may be less than a nitrogen content in the second protective layer.

9. 发明授权

US11328396B2 Image acquisition device and method of controlling the same 有权
公开(公告)号：US11328396B2
公开(公告)日：2022-05-10
申请号：US16232711
申请日：2018-12-26
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Jaeho Jung , Yeultak Sung
IPC分类号： G06K9/00 , G06T5/50 , G06T7/246 , G06T5/00
摘要： Provided is an artificial intelligence (AI) system that mimics functions, such as recognition and determination by human brains, by utilizing a machine learning algorithm, such as deep learning, and applications of the AI system. An image acquisition device is disclosed including a camera configured to acquire a first image, wherein a portion of a main object is hidden from the camera by a sub-object; at least one processor configured to input the first image to a first AI neural network; detect, by the first AI neural network from data corresponding to a plurality of objects included in the first image, first data corresponding to the main object and second data corresponding to the sub-object from the first image by inputting the first image to an AI neural network, remove the sub-object from the first image, and generate, using a second AI neural network, a second image by restoring third data corresponding to at least a portion of the main object hidden by the removed sub-object by using the AI neural network, wherein the third data replaces the second data; and a display configured to display at least one of the first image and the second image.

10. 发明申请

US20210050520A1 METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A LOW-K DIELECTRIC MATERIAL LAYER 有权
公开(公告)号：US20210050520A1
公开(公告)日：2021-02-18
申请号：US16874781
申请日：2020-05-15
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： Youngmin Ko , Jonguk Kim , Jaeho Jung , Dongsung Choi
IPC分类号： H01L45/00 , H01L27/24 , H01L21/02 , B05D1/00 , C08G77/20
摘要： A method for manufacturing a semiconductor device includes forming a first pattern structure having a first opening on a lower structure comprising a semiconductor substrate. The first pattern structure includes a stacked pattern and a first spacer layer covering at least a side surface of the stacked pattern. A first flowable material layer including a SiOCH material is formed on the first spacer layer to fill the first opening and cover an upper portion of the first pattern structure. A first curing process including supplying a gaseous ammonia catalyst into the first flowable material layer is performed on the first flowable material layer to form a first cured material layer that includes water. A second curing process is performed on the first cured material layer to form a first low-k dielectric material layer. The first low-k dielectric material layer is planarized to form a planarized first low-k dielectric material layer.

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