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1. 发明申请

US20130107602A1 3-D NONVOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
标题翻译： 3-D非易失性存储器件及其制造方法
公开(公告)号：US20130107602A1
公开(公告)日：2013-05-02
申请号：US13601531
申请日：2012-08-31
申请人： Sang Hyun OH , Seiichi Aritome , Sang Bum LEE
发明人： Sang Hyun OH , Seiichi Aritome , Sang Bum LEE
IPC分类号： H01L27/088 , H01L21/336 , G11C5/02
CPC分类号： H01L27/11556 , G11C16/0408 , G11C16/14 , H01L21/8221 , H01L27/11524 , H01L27/1157 , H01L27/11578 , H01L27/11582
摘要： A three-dimensional (3-D) nonvolatile memory device includes a channel layer protruded from a substrate, a plurality of memory cells stacked along the channel layer, a source line coupled to the end of one side of the channel layer, a bit line coupled to the end of the other side of the channel layer, a first junction interposed between the end of one side of the channel layer and the source line and configured to have a P type impurity doped therein, and a second junction interposed between the end of the other side of the channel layer and the bit line and configured to have an N type impurity doped therein.
摘要翻译：三维（3-D）非易失性存储器件包括从衬底突出的沟道层，沿着沟道层堆叠的多个存储单元，耦合到沟道层一侧的端部的源极线，位线耦合到沟道层的另一侧的端部，插入在沟道层的一侧的端部和源极线之间并且被配置为在其中掺杂有P型杂质的第一结，以及插入在端部之间的第二结的沟道层的另一侧和位线，并且被配置为在其中掺杂有N型杂质。

2. 发明申请

US20130154055A1 CAPACITOR AND REGISTER OF SEMICONDUCTOR DEVICE, MEMORY SYSTEM INCLUDING THE SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 有权
公开(公告)号：US20130154055A1
公开(公告)日：2013-06-20
申请号：US13616439
申请日：2012-09-14
申请人： Sun Mi PARK , Sang Hyun OH , Sang Bum LEE
发明人： Sun Mi PARK , Sang Hyun OH , Sang Bum LEE
IPC分类号： H01L23/535 , H01L21/02 , H01L21/768 , H01L23/48
CPC分类号： H01L28/60 , H01L27/0805 , H01L27/10844 , H01L27/11573 , H01L27/11582 , H01L28/91
摘要： A capacitor of a semiconductor device includes a capacitor structure configured to include electrode layers and dielectric layers alternately stacked, edge regions each stepwise patterned, and a central region disposed between the edge regions, sacrificial layers disposed within the respective electrode layers in the edge regions of the capacitor structure, and support plugs formed in the central region of the capacitor structure and configured to penetrate the electrode layers and the dielectric layers.

3. 发明申请

US20120273865A1 3-D NON-VOLATILE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译： 3-D非易失性存储器件及其制造方法
公开(公告)号：US20120273865A1
公开(公告)日：2012-11-01
申请号：US13455464
申请日：2012-04-25
申请人： In Hey LEE , Byung Soo PARK , Sang Hyun OH , Sun Mi PARK
发明人： In Hey LEE , Byung Soo PARK , Sang Hyun OH , Sun Mi PARK
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L27/11556 , H01L27/11582 , H01L29/7926
摘要： A three dimensional (3-D) non-volatile memory device includes a pipe gate including a first pipe gate, a second pipe gate formed on the first pipe gate, and a first interlayer insulating layer interposed between the first pipe gate and the second pipe gate, word lines alternately stacked with second interlayer insulating layers on the pipe gate, a pipe channel buried within the pipe gate, and memory cell channels coupled to the pipe channel and arranged to pass through the word lines and the second interlayer insulating layers.
摘要翻译：一种三维（3-D）非易失性存储装置，包括：一个管道浇口，包括一个第一管道浇口，一个形成在第一个管道上的第二个浇口浇口，以及一个介于第一个浇口浇口和第二个管子之间的第一层间绝缘层栅极，与管道上的第二层间绝缘层交替堆叠的字线，管栅内的管道，以及耦合到管道并被布置成穿过字线和第二层间绝缘层的存储单元通道。

4. 发明申请

US20120120725A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
标题翻译：半导体存储器件及其操作方法
公开(公告)号：US20120120725A1
公开(公告)日：2012-05-17
申请号：US13297467
申请日：2011-11-16
申请人： Jung Ryul AHN , Sang Hyun OH , Jum Soo KIM
发明人： Jung Ryul AHN , Sang Hyun OH , Jum Soo KIM
IPC分类号： G11C16/16 , G11C16/04
CPC分类号： G11C16/0483 , G11C16/16 , H01L27/11524
摘要： A method of operating a semiconductor memory device includes a memory array having memory cell strings including a first and a second memory cell groups having memory cells, a first and a second dummy elements, a drain select transistor and a source select transistor, wherein the first memory cell group and the second memory cell group are arranged between the drain select transistor and the source select transistor; connecting electrically the first memory cell group to the second memory cell group during a program operation or a read operation of the first memory cell group or the second memory cell group; and performing separately an erase operation of the first memory cell group and an erase operation of the second memory cell group, selecting simultaneously one of the first dummy element and the second dummy element during the erase operation of the selected memory cell group.
摘要翻译：一种操作半导体存储器件的方法包括具有存储单元串的存储器阵列，存储单元串包括具有存储单元的第一和第二存储单元组，第一和第二虚设元件，漏极选择晶体管和源选择晶体管，其中第一存储单元组和第二存储单元组布置在漏极选择晶体管和源极选择晶体管之间; 在第一存储单元组或第二存储单元组的编程操作或读操作期间将第一存储单元组电连接到第二存储单元组; 以及分别执行第一存储单元组的擦除操作和第二存储单元组的擦除操作，在所选存储单元组的擦除操作期间同时选择第一虚拟元件和第二虚设元件中的一个。

5. 发明申请

US20120049223A1 LIGHT EMITTING DIODE WITH IMPROVED LUMINOUS EFFICIENCY 有权
标题翻译：发光二极管具有提高的光效
公开(公告)号：US20120049223A1
公开(公告)日：2012-03-01
申请号：US13209765
申请日：2011-08-15
申请人： Jeong Hee YANG , Kyoung Wan KIM , Yeo Jin YOON , Ye Seul KIM , Sang Hyun OH , Duk Il SUH , Keum Ju LEE , Jin Woong LEE , Da Yeon JEONG
发明人： Jeong Hee YANG , Kyoung Wan KIM , Yeo Jin YOON , Ye Seul KIM , Sang Hyun OH , Duk Il SUH , Keum Ju LEE , Jin Woong LEE , Da Yeon JEONG
IPC分类号： H01L33/58 , H01L33/42
CPC分类号： H01L33/385 , H01L33/20 , H01L33/38 , H01L33/42 , H01L2933/0091
摘要： Exemplary embodiments of the present invention relate to light emitting diodes. A light emitting diode according to an exemplary embodiment of the present invention includes a substrate having a first side edge and a second side edge, and a light emitting structure arranged on the substrate. The light emitting structure includes a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer. A transparent electrode layer including a concave portion and a convex portion is arranged on the second conductivity-type semiconductor layer. A first electrode pad contacts an upper surface of the first conductivity-type semiconductor layer and is located near a center of the first side edge. Two second electrode pads are located near opposite distal ends of the second side edge to supply electric current to the second conductivity-type semiconductor layer. A first pad extension extends from the first electrode pad and a second pad extension extends from each of the two second electrode pads.
摘要翻译：本发明的示例性实施例涉及发光二极管。根据本发明的示例性实施例的发光二极管包括具有第一侧边缘和第二侧边缘的基板和布置在基板上的发光结构。发光结构包括第一导电型半导体层，有源层和第二导电型半导体层。在第二导电型半导体层上配置有包含凹部和凸部的透明电极层。第一电极焊盘接触第一导电类型半导体层的上表面并且位于第一侧边缘的中心附近。两个第二电极焊盘位于第二侧边缘的相对的远端附近，以向第二导电类型半导体层提供电流。第一焊盘延伸部从第一电极焊盘延伸，并且第二焊盘延伸部从两个第二电极焊盘中的每一个延伸。

6. 发明申请

US20120025244A1 LIGHT EMITTING DIODE HAVING DISTRIBUTED BRAGG REFLECTOR 有权
标题翻译：具有分布式BRAGG反射器的发光二极管
公开(公告)号：US20120025244A1
公开(公告)日：2012-02-02
申请号：US13100879
申请日：2011-05-04
申请人： Duk Il SUH , Jae Moo KIM , Kyoung Wan KIM , Yeo Jin YOON , Ye Seul KIM , Sang Hyun OH , Jin Woong LEE
发明人： Duk Il SUH , Jae Moo KIM , Kyoung Wan KIM , Yeo Jin YOON , Ye Seul KIM , Sang Hyun OH , Jin Woong LEE
IPC分类号： H01L33/58
CPC分类号： H01L33/46 , H01L33/10 , H01L33/38 , H01L33/42 , H01L33/50 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
摘要： Exemplary embodiments of the present invention provide light-emitting diodes having a distributed Bragg reflector. A light-emitting diode (LED) according to an exemplary embodiment includes a light-emitting structure arranged on a first surface of a substrate, the light-emitting structure including a first conductivity-type semiconductor layer, a second conductivity-type semiconductor layer, and an active layer interposed between the first conductivity-type semiconductor layer and the second conductivity-type semiconductor layer. A first distributed Bragg reflector is arranged on a second surface of the substrate opposite to the first surface, the first distributed Bragg reflector to reflect light emitted from the light-emitting structure. The first distributed Bragg reflector has a reflectivity of at least 90% with respect to light of a first wavelength in a blue wavelength range, light of a second wavelength in a green wavelength range, and light of a third wavelength in a red wavelength range. The first distributed Bragg reflector has a laminate structure having an alternately stacked SiO2 layer and Nb2O5 layer.
摘要翻译：本发明的示例性实施例提供了具有分布式布拉格反射器的发光二极管。根据示例性实施例的发光二极管（LED）包括布置在基板的第一表面上的发光结构，所述发光结构包括第一导电类型半导体层，第二导电类型半导体层，以及插入在第一导电型半导体层和第二导电型半导体层之间的有源层。第一分布式布拉格反射器布置在基板的与第一表面相对的第二表面上，第一分布布拉格反射器用于反射从发光结构发射的光。第一分布布拉格反射器相对于蓝色波长范围内的第一波长的光，绿色波长范围内的第二波长的光和红色波长范围内的第三波长的光具有至少90％的反射率。第一分布布拉格反射器具有层叠结构，其具有交替层叠的SiO 2层和Nb 2 O 5层。

7. 发明申请

US20090140319A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 失效
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20090140319A1
公开(公告)日：2009-06-04
申请号：US12133775
申请日：2008-06-05
申请人： Sang Hyun OH
发明人： Sang Hyun OH
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L29/51 , H01L27/115 , H01L27/11521 , H01L29/7881
摘要： A semiconductor memory devices and a method of fabricating the same includes sequentially stacking a tunnel insulating layer, a first nano-grain film, a conductive layer for a floating gate, and a second nano-grain film over a semiconductor substrate, forming a trench by etching the second nano-grain film, the conductive layer for the floating gate, the first nano-grain film, the tunnel insulating layer, and the semiconductor substrate, gap-filling the trench with an insulating layer, thus forming an isolation layer, and forming a third nano-grain film on sidewalls of the conductive layer for the floating gate.
摘要翻译：半导体存储器件及其制造方法包括在半导体衬底上依次堆叠隧道绝缘层，第一纳米晶粒膜，浮栅的导电层和第二纳米晶粒膜，通过蚀刻第二纳米晶粒膜，用于浮置栅极的导电层，第一纳米晶粒膜，隧道绝缘层和半导体衬底，用绝缘层填充沟槽，从而形成隔离层，以及在用于浮动栅极的导电层的侧壁上形成第三纳米晶粒膜。

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