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1. 发明申请

US20060279511A1 Shift register and a display device including the shift register 有权
标题翻译：移位寄存器和包括移位寄存器的显示设备
公开(公告)号：US20060279511A1
公开(公告)日：2006-12-14
申请号：US11411473
申请日：2006-04-26
申请人： Kee-Han Uh , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
发明人： Kee-Han Uh , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
IPC分类号： G09G3/36
CPC分类号： G11C19/28 , G09G3/3677 , G09G2320/0219 , G11C19/184
摘要： A shift register and a display device having the shift register are provided. The shift register has a plurality of stages which sequentially generate output signals in synchronization with a plurality of clock signals. Each of the stages includes an input unit for receiving a scan start signal or an output signal from a previous stage and outputting the scan start signal or the output signal as a first voltage, a first unit for passing at least two clock signals, a second unit for outputting at least one of the at least two clock signals or a second voltage in response to an output signal from a next stage, and an output unit for generating an output signal synchronized with at least one of the at least two clock signals in response to the outputs of the input unit and the second unit.
摘要翻译：提供了具有移位寄存器的移位寄存器和显示装置。移位寄存器具有与多个时钟信号同步地顺序产生输出信号的多个级。每个级包括用于接收来自前一级的扫描开始信号或输出信号的输入单元，并将扫描开始信号或输出信号作为第一电压输出，第一单元，用于通过至少两个时钟信号，第二单元单元，用于响应于来自下一级的输出信号输出至少两个时钟信号中的至少一个或第二电压;以及输出单元，用于产生与至少两个时钟信号中的至少一个同步的输出信号，响应输入单元和第二单元的输出。

2. 发明申请

US20060071923A1 Shift register, gate driving circuit and display panel having the same, and method thereof 有权
标题翻译：移位寄存器，栅极驱动电路和具有其的显示面板及其方法
公开(公告)号：US20060071923A1
公开(公告)日：2006-04-06
申请号：US11242387
申请日：2005-10-03
申请人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
发明人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G11C19/184
摘要： A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and an output signal of a previous stage so that the driving section generates the output signal of a present stage. The first charging section includes a first terminal electrically connected to the driving section and a second terminal electrically connected to a first source voltage. The charging control section applies the output signal of a next stage to the first charging section. Therefore, a gradual failure of TFT is reduced.
摘要翻译：移位寄存器包括多个级，它们依次产生输出信号，包括缓冲部分，驱动部分，第一充电部分和充电控制部分。缓冲部分接收前一级的扫描开始信号和输出信号中的一个，使得驱动部分产生当前级的输出信号。第一充电部包括电连接到驱动部的第一端子和与第一源电压电连接的第二端子。充电控制部分将下一级的输出信号施加到第一充电部分。因此，TFT的逐渐故障降低。

3. 发明授权

US07936331B2 Shift register and a display device including the shift register 有权
标题翻译：移位寄存器和包括移位寄存器的显示设备
公开(公告)号：US07936331B2
公开(公告)日：2011-05-03
申请号：US11411473
申请日：2006-04-26
申请人： Kee-Han Uh , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
发明人： Kee-Han Uh , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
IPC分类号： G09G3/34
CPC分类号： G11C19/28 , G09G3/3677 , G09G2320/0219 , G11C19/184
摘要： A shift register and a display device having the shift register are provided. The shift register has a plurality of stages which sequentially generate output signals in synchronization with a plurality of clock signals. Each of the stages includes an input unit for receiving a scan start signal or an output signal from a previous stage and outputting the scan start signal or the output signal as a first voltage, a first unit for passing at least two clock signals, a second unit for outputting at least one of the at least two clock signals or a second voltage in response to an output signal from a next stage, and an output unit for generating an output signal synchronized with at least one of the at least two clock signals in response to the outputs of the input unit and the second unit.
摘要翻译：提供了具有移位寄存器的移位寄存器和显示装置。移位寄存器具有与多个时钟信号同步地顺序产生输出信号的多个级。每个级包括用于接收来自前一级的扫描开始信号或输出信号的输入单元，并将扫描开始信号或输出信号作为第一电压输出，第一单元，用于通过至少两个时钟信号，第二单元单元，用于响应于来自下一级的输出信号输出至少两个时钟信号中的至少一个或第二电压;以及输出单元，用于产生与至少两个时钟信号中的至少一个同步的输出信号，响应输入单元和第二单元的输出。

4. 发明授权

US07548228B2 Gate driver circuit and display device having the same 有权
标题翻译：栅极驱动器电路和具有相同的显示装置
公开(公告)号：US07548228B2
公开(公告)日：2009-06-16
申请号：US11289161
申请日：2005-11-29
申请人： Sang-Jin Pak , Myung-Woo Lee , Hyung-Guel Kim , Kee-Han Uh , Dong-Jin Jeong , Joo-Hyung Lee
发明人： Sang-Jin Pak , Myung-Woo Lee , Hyung-Guel Kim , Kee-Han Uh , Dong-Jin Jeong , Joo-Hyung Lee
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/20 , G11C19/287
摘要： The first shift register applies (4n−3)-th and (4n−2)-th gate signals to (4n−3)-th and (4n−2)-th gate lines, respectively, in response to a first clock signal, a second clock signal having a delayed phase by 1H time with respect to the first clock signal, and a third clock signal having opposite phase to the first clock signal. The second shift register applies (4n−1)-th and 4n-th gate signals to (4n−1)-th and 4n-th gate lines, respectively, in response to the first clock signal, the third clock signal, and a fourth clock signal having opposite phase to the second clock signal. Therefore, a number of transistors in the first and second shift registers may be reduced.
摘要翻译：响应于第一时钟信号，第一移位寄存器将（4n-3）和（4n-2）个门信号分别施加到第（4n-3）和（4n-2），相对于第一时钟信号具有1H时间的延迟相位的第二时钟信号和与第一时钟信号相反相位的第三时钟信号。第二移位寄存器响应于第一时钟信号，第三时钟信号和第四时钟信号分别将（4n-1）和第4n个栅极信号施加到（4n-1）和第4n个栅极线第四时钟信号与第二时钟信号具有相反相位。因此，可以减少第一和第二移位寄存器中的多个晶体管。

5. 发明授权

US07250788B2 Shift register, gate driving circuit and display panel having the same, and method thereof 有权
标题翻译：移位寄存器，栅极驱动电路和具有其的显示面板及其方法
公开(公告)号：US07250788B2
公开(公告)日：2007-07-31
申请号：US11242387
申请日：2005-10-03
申请人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
发明人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
IPC分类号： H03K19/173
CPC分类号： G09G3/3677 , G09G2300/0408 , G11C19/184
摘要： A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and an output signal of a previous stage so that the driving section generates the output signal of a present stage. The first charging section includes a first terminal electrically connected to the driving section and a second terminal electrically connected to a first source voltage. The charging control section applies the output signal of a next stage to the first charging section. Therefore, a gradual failure of TFT is reduced.
摘要翻译：移位寄存器包括多个级，它们依次产生输出信号，包括缓冲部分，驱动部分，第一充电部分和充电控制部分。缓冲部分接收前一级的扫描开始信号和输出信号中的一个，使得驱动部分产生当前级的输出信号。第一充电部包括电连接到驱动部的第一端子和与第一源电压电连接的第二端子。充电控制部分将下一级的输出信号施加到第一充电部分。因此，TFT的逐渐故障降低。

6. 发明申请

US20060001637A1 Shift register, display device having the same and method of driving the same 有权
公开(公告)号：US20060001637A1
公开(公告)日：2006-01-05
申请号：US11170992
申请日：2005-06-30
申请人： Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
发明人： Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2320/043 , G11C19/184 , G11C19/28
摘要： A shift register includes stages to generate gate signals in sequence. Each of the stages includes a first pull up drive control section, a pull up drive section and a pull down drive section. The first pull up drive control section outputs a control signal based on the gate signal of an adjacent stage. The pull up drive section receives a first clock signal and outputs the first clock signal as the gate signal to a corresponding gate line in response to the control signal. The pull down drive section inactivates the corresponding gate line in response to a second clock signal.

7. 发明授权

US08605027B2 Shift register, display device having the same and method of driving the same 有权
标题翻译：移位寄存器，具有相同的显示装置及其驱动方法
公开(公告)号：US08605027B2
公开(公告)日：2013-12-10
申请号：US11170992
申请日：2005-06-30
申请人： Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
发明人： Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Myung-Woo Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2320/043 , G11C19/184 , G11C19/28
摘要： A shift register includes stages to generate gate signals in sequence. Each of the stages includes a first pull up drive control section, a pull up drive section and a pull down drive section. The first pull up drive control section outputs a control signal based on the gate signal of an adjacent stage. The pull up drive section receives a first clock signal and outputs the first clock signal as the gate signal to a corresponding gate line in response to the control signal. The pull down drive section inactivates the corresponding gate line in response to a second clock signal.
摘要翻译：移位寄存器包括依次产生门信号的级。每个级包括第一上拉驱动控制部分，上拉驱动部分和下拉驱动部分。第一上拉驱动控制部根据相邻级的门信号输出控制信号。上拉驱动部分接收第一时钟信号，并响应于控制信号将第一时钟信号作为门信号输出到相应的选通线。下拉驱动部分响应于第二个时钟信号使相应的门极线失效。

8. 发明授权

US07446570B2 Shift register, gate driving circuit and display panel having the same, and method thereof 有权
标题翻译：移位寄存器，栅极驱动电路和具有其的显示面板及其方法
公开(公告)号：US07446570B2
公开(公告)日：2008-11-04
申请号：US11771253
申请日：2007-06-29
申请人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
发明人： Myung-Woo Lee , Sang-Jin Pak , Joo-Hyung Lee , Hyung-Guel Kim , Man-Seung Cho , Kee-Han Uh
IPC分类号： H03K19/0175
CPC分类号： G09G3/3677 , G09G2300/0408 , G11C19/184
摘要： A shift register includes a plurality of stages each generating an output signal in sequence and including a buffering section, a driving section, a first charging section, and a charging control section. The buffering section receives one of a scan start signal and an output signal of a previous stage so that the driving section generates the output signal of a present stage. The first charging section includes a first terminal electrically connected to the driving section and a second terminal electrically connected to a first source voltage. The charging control section applies the output signal of a next stage to the first charging section. Therefore, a gradual failure of TFT is reduced.
摘要翻译：移位寄存器包括多个级，它们依次产生输出信号，包括缓冲部分，驱动部分，第一充电部分和充电控制部分。缓冲部分接收前一级的扫描开始信号和输出信号中的一个，使得驱动部分产生当前级的输出信号。第一充电部包括电连接到驱动部的第一端子和与第一源电压电连接的第二端子。充电控制部分将下一级的输出信号施加到第一充电部分。因此，TFT的逐渐故障降低。

9. 发明申请

US20060221040A1 Gate driver circuit and display device having the same 有权
标题翻译：栅极驱动器电路和具有相同的显示装置
公开(公告)号：US20060221040A1
公开(公告)日：2006-10-05
申请号：US11289161
申请日：2005-11-29
申请人： Sang-Jin Pak , Myung-Woo Lee , Hyung-Guel Kim , Kee-Han Uh , Dong-Jin Jeong , Joo-Hyung Lee
发明人： Sang-Jin Pak , Myung-Woo Lee , Hyung-Guel Kim , Kee-Han Uh , Dong-Jin Jeong , Joo-Hyung Lee
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/20 , G11C19/287
摘要： A gate driver circuit includes a first shift register and a second shift register. The first shift register applies (4n−3)-th and (4n−2)-th gate signals to (4n−3)-th and (4n−2)-th gate lines, respectively, in response to a first clock signal, a second clock signal having a delayed phase by 1H time with respect to the first clock signal, and a third clock signal having opposite phase to the first clock signal. The second shift register applies (4n−1)-th and 4n-th gate signals to (4n−1)-th and 4n-th gate lines, respectively, in response to the first clock signal, the third clock signal, and a fourth clock signal having opposite phase to the second clock signal. Therefore, a number of transistors in the first and second shift registers may be reduced.
摘要翻译：栅极驱动器电路包括第一移位寄存器和第二移位寄存器。响应于第一时钟信号，第一移位寄存器将（4n-3）和（4n-2）个门信号分别施加到第（4n-3）和（4n-2），相对于第一时钟信号具有1H时间的延迟相位的第二时钟信号和与第一时钟信号相反相位的第三时钟信号。第二移位寄存器响应于第一时钟信号，第三时钟信号和第四时钟信号分别将（4n-1）和第4n个栅极信号施加到（4n-1）和第4n个栅极线第四时钟信号与第二时钟信号具有相反相位。因此，可以减少第一和第二移位寄存器中的多个晶体管。

10. 发明申请

US20060176266A1 Display apparatus and method of driving the same 审中-公开
标题翻译：显示装置及其驱动方法
公开(公告)号：US20060176266A1
公开(公告)日：2006-08-10
申请号：US11327130
申请日：2006-01-05
申请人： Sang-Jin Pak , Myung-Woo Lee , Young-Ok Cha , Kee-Han Uh , Joo-Hyung Lee , Young-Jun Choi , Hyung-Guel Kim , Dong-Jin Jeong , Jong-Woung Park , Man-Seung Cho
发明人： Sang-Jin Pak , Myung-Woo Lee , Young-Ok Cha , Kee-Han Uh , Joo-Hyung Lee , Young-Jun Choi , Hyung-Guel Kim , Dong-Jin Jeong , Jong-Woung Park , Man-Seung Cho
IPC分类号： G02F1/1335
CPC分类号： G02F1/13338 , G06F3/0412 , G06F3/044 , G09G3/3648
摘要： A display panel includes an array substrate, an opposite substrate and a liquid crystal layer disposed between the array substrate and the opposite substrate. A sensing array outputs an initial voltage in response to an initial thickness of the liquid crystal layer during an initializing time and a sensing voltage in response to a varied thickness of the liquid crystal layer due to external force during a sensing time. A control part compares the sensing voltage with the initial voltage, determines whether the external force is applied to the display panel, and generates information indicating a position to which the external force is applied. Thus, the display apparatus may improve sensing ability to an external signal inputted through the display panel thereof.
摘要翻译：显示面板包括阵列基板，相对基板和设置在阵列基板和相对基板之间的液晶层。感测阵列响应于在初始化时间期间液晶层的初始厚度和响应于在感测时间期间的外力而导致的液晶层的厚度变化的感测电压而输出初始电压。控制部分将感测电压与初始电压进行比较，确定外力是否施加到显示面板，并产生指示施加外力的位置的信息。因此，显示装置可以提高通过其显示面板输入的外部信号的感测能力。

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