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    • 1. 发明授权
    • Communication timing changing method and device
    • 通信定时更改方法和设备
    • US07839961B2
    • 2010-11-23
    • US11345502
    • 2006-02-02
    • Seishin AsatoAkira MatsuiNaoki HayashiTomoki Numata
    • Seishin AsatoAkira MatsuiNaoki HayashiTomoki Numata
    • H04L7/00
    • G06F1/12H04L7/0008
    • The invention aims at providing communication timing changing method and device which are capable of changing timing of communication for setting control parameters used to determine operations of analog devices in the analog devices, respectively, over to another one not impeding any of the operation of the analog devices. An interface decoder decodes a control parameter communication signal outputted from a CPU, converts the resulting signal into control parameters, and preserves the resulting control parameters in a register. Interface encoders perform timing management based on a synchronous signal received from a synchronous signal generating circuit, read out the control parameters to be set in analog devices such as an image sensor driving circuit, a sample and hold circuit, and an ADC from a register, and communicate with the analog devices at good timing during a blanking period to set the control parameters in the analog devices, respectively.
    • 本发明旨在提供通信定时改变方法和装置,其能够改变用于设置用于确定模拟装置中的模拟装置的操作的控制参数的通信的定时到另一个不妨碍模拟的任何操作的通信定时改变方法和装置 设备。 接口解码器对从CPU输出的控制参数通信信号进行解码,将结果信号转换为控制参数,并将结果控制参数保存在寄存器中。 接口编码器基于从同步信号发生电路接收到的同步信号执行定时管理,从寄存器中读出要在诸如图像传感器驱动电路,采样保持电路和ADC的模拟设备中设置的控制参数, 并在消隐期间以良好的时序与模拟设备进行通信,以分别在模拟设备中设置控制参数。
    • 2. 发明申请
    • Communication timing changing method and device
    • 通信定时更改方法和设备
    • US20060193412A1
    • 2006-08-31
    • US11345502
    • 2006-02-02
    • Seishin AsatoAkira MatsuiNaoki HayashiTomoki Numata
    • Seishin AsatoAkira MatsuiNaoki HayashiTomoki Numata
    • H04L7/00
    • G06F1/12H04L7/0008
    • The invention aims at providing communication timing changing method and device which are capable of changing timing of communication for setting control parameters used to determine operations of analog devices in the analog devices, respectively, over to another one not impeding any of the operation of the analog devices. An interface decoder decodes a control parameter communication signal outputted from a CPU, converts the resulting signal into control parameters, and preserves the resulting control parameters in a register. Interface encoders perform timing management based on a synchronous signal received from a synchronous signal generating circuit, read out the control parameters to be set in analog devices such as an image sensor driving circuit, a sample and hold circuit, and an ADC from a register, and communicate with the analog devices at good timing during a blanking period to set the control parameters in the analog devices, respectively.
    • 本发明旨在提供通信定时改变方法和装置,其能够改变用于设置用于确定模拟装置中的模拟装置的操作的控制参数的通信的定时到另一个不妨碍模拟的任何操作的通信定时改变方法和装置 设备。 接口解码器对从CPU输出的控制参数通信信号进行解码,将结果信号转换为控制参数,并将结果控制参数保存在寄存器中。 接口编码器基于从同步信号发生电路接收到的同步信号执行定时管理,从寄存器中读出要在诸如图像传感器驱动电路,采样保持电路和ADC的模拟设备中设置的控制参数, 并在消隐期间以良好的时序与模拟设备进行通信,以分别在模拟设备中设置控制参数。
    • 4. 发明申请
    • DRIVE METHOD FOR SOLID-STATE IMAGING DEVICE, SOLID-STATE IMAGING DEVICE, AND IMAGING APPARATUS
    • 用于固态成像装置的驱动方法,固态成像装置和成像装置
    • US20090160988A1
    • 2009-06-25
    • US12393179
    • 2009-02-26
    • Kazuhide YokotaHisashi KurebayashiKenji TanakaAkira MatsuiYutaka YonedaSeishin AsatoTakuya ChibaRyota Kosakai
    • Kazuhide YokotaHisashi KurebayashiKenji TanakaAkira MatsuiYutaka YonedaSeishin AsatoTakuya ChibaRyota Kosakai
    • H04N5/335
    • H04N9/045H04N5/347
    • A solid-state imaging device having: (a) a pixel array with an oblique pixel pattern in which pixels are obliquely disposed, an odd-numbered row vertical signal line in an odd-numbered row vertical signal line group being connected to each column of odd-numbered row pixels and an even-numbered row vertical signal line in an even-numbered row vertical signal line group being connected to each column of even-numbered row pixels; (b) a row selector for separately selecting an odd-numbered row and an even-numbered row of the oblique pixel pattern; (c) an odd-numbered row column processing circuit group including column processing circuits and connected to the odd-numbered row vertical signal line group, for adding signals of the odd-numbered row pixels between columns; (d) an even-numbered row column processing circuit group including column processing circuits and connected to the even-numbered row vertical signal line group, for adding signals of the even-numbered row pixels in pixel columns; and (d) a column selector for selecting the column processing circuits of the odd-numbered row column processing circuit group and the column processing circuits of the even-numbered row column processing circuit group.
    • 一种固态成像装置,具有:(a)具有倾斜像素图案的像素阵列,其中倾斜地设置有像素,奇数行垂直信号线组中的奇数行垂直信号线连接到每列 偶数行像素和偶数行垂直信号线组中的偶数行垂直信号线连接到每列偶数行像素; (b)用于分别选择倾斜像素图案的奇数行和偶数行的行选择器; (c)包括列处理电路并连接到奇数行垂直信号线组的奇数列列处理电路组,用于将列之间的奇数行像素的信号相加; (d)偶数行列处理电路组,包括列处理电路并连接到偶数行垂直信号线组,用于将像素列中的偶数行像素的信号相加; 和(d)用于选择奇数行列处理电路组的列处理电路和偶数行列处理电路组的列处理电路的列选择器。
    • 6. 发明授权
    • Drive method for solid-state imaging device, solid-state imaging device, and imaging apparatus
    • 用于固态成像装置,固态成像装置和成像装置的驱动方法
    • US08023018B2
    • 2011-09-20
    • US12393179
    • 2009-02-26
    • Kazuhide YokotaHisashi KurebayashiKenji TanakaAkira MatsuiYutaka YonedaSeishin AsatoTakuya ChibaRyota Kosakai
    • Kazuhide YokotaHisashi KurebayashiKenji TanakaAkira MatsuiYutaka YonedaSeishin AsatoTakuya ChibaRyota Kosakai
    • H04N3/14H04N5/335H04N9/083H01L27/00
    • H04N9/045H04N5/347
    • A solid-state imaging device having: (a) a pixel array with an oblique pixel pattern in which pixels are obliquely disposed, an odd-numbered row vertical signal line in an odd-numbered row vertical signal line group being connected to each column of odd-numbered row pixels and an even-numbered row vertical signal line in an even-numbered row vertical signal line group being connected to each column of even-numbered row pixels; (b) a row selector for separately selecting an odd-numbered row and an even-numbered row of the oblique pixel pattern; (c) an odd-numbered row column processing circuit group including column processing circuits and connected to the odd-numbered row vertical signal line group, for adding signals of the odd-numbered row pixels between columns; (d) an even-numbered row column processing circuit group including column processing circuits and connected to the even-numbered row vertical signal line group, for adding signals of the even-numbered row pixels in pixel columns; and (d) a column selector for selecting the column processing circuits of the odd-numbered row column processing circuit group and the column processing circuits of the even-numbered row column processing circuit group.
    • 一种固态成像装置,具有:(a)具有倾斜像素图案的像素阵列,其中倾斜地设置有像素,奇数行垂直信号线组中的奇数行垂直信号线连接到每列 偶数行像素和偶数行垂直信号线组中的偶数行垂直信号线连接到每列偶数行像素; (b)用于分别选择倾斜像素图案的奇数行和偶数行的行选择器; (c)包括列处理电路并连接到奇数行垂直信号线组的奇数列列处理电路组,用于将列之间的奇数行像素的信号相加; (d)偶数行列处理电路组,包括列处理电路并连接到偶数行垂直信号线组,用于将像素列中的偶数行像素的信号相加; 和(d)用于选择奇数行列处理电路组的列处理电路和偶数行列处理电路组的列处理电路的列选择器。