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1. 发明授权

US09171959B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09171959B2
公开(公告)日：2015-10-27
申请号：US14700528
申请日：2015-04-30
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Motomu Kurata , Shinya Sasagawa , Taiga Muraoka , Tetsuhiro Tanaka , Junichi Koezuka
IPC分类号： H01L21/00 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/66742 , H01L29/66969
摘要： Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.
摘要翻译：提供了一种具有稳定和高电特性并且高产率的小型化晶体管。在包括依次层叠有氧化物半导体膜，栅极绝缘膜和栅极电极层的晶体管的半导体装置中，设置与栅电极层的侧面接触的第一侧壁绝缘层，提供第二侧壁绝缘层以覆盖第一侧壁绝缘层的侧表面。第一侧壁绝缘层是在其侧表面上形成具有均匀形状的缝隙的氧化铝膜。第二侧壁绝缘层设置成覆盖缝隙。源电极层和漏电极层设置成与氧化物半导体膜和第二侧壁绝缘层接触。

2. 发明授权

US09048321B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US09048321B2
公开(公告)日：2015-06-02
申请号：US13686332
申请日：2012-11-27
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Motomu Kurata , Shinya Sasagawa , Taiga Muraoka , Tetsuhiro Tanaka , Junichi Koezuka
IPC分类号： H01L29/10 , H01L29/786 , H01L29/66
CPC分类号： H01L29/7869 , H01L29/66742 , H01L29/66969
摘要： Provided is a miniaturized transistor with stable and high electrical characteristics with high yield. In a semiconductor device including the transistor in which an oxide semiconductor film, a gate insulating film, and a gate electrode layer are stacked in this order, a first sidewall insulating layer is provided in contact with a side surface of the gate electrode layer, and a second sidewall insulating layer is provided to cover a side surface of the first sidewall insulating layer. The first sidewall insulating layer is an aluminum oxide film in which a crevice with an even shape is formed on its side surface. The second sidewall insulating layer is provided to cover the crevice. A source electrode layer and a drain electrode layer are provided in contact with the oxide semiconductor film and the second sidewall insulating layer.

3. 发明授权

US10043914B2 Semiconductor device comprising a plurality of oxide semiconductor layers 有权
公开(公告)号：US10043914B2
公开(公告)日：2018-08-07
申请号：US15175183
申请日：2016-06-07
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Motomu Kurata , Shinya Sasagawa , Taiga Muraoka , Hiroaki Honda , Takashi Hamada
IPC分类号： H01L27/12 , H01L29/786 , H01L29/66 , H01L21/02 , H01L29/417
摘要： A substrate having an insulating surface is prepared; a stacked film including a first oxide semiconductor layer and a second oxide semiconductor layer is formed over the substrate; a mask layer is formed over part of the stacked film and then dry etching treatment is performed, so that the stacked film is removed, with a region provided with the mask layer remaining, and a reaction product is formed on a side surface of the remaining stacked film; the reaction product is removed by wet etching treatment after removal of the mask layer; a source electrode and a drain electrode are formed over the stacked film; and a third oxide semiconductor layer, a gate insulating film, and a gate electrode are stacked and formed in this order over the stacked film, and the source electrode and the drain electrode.

4. 发明授权

US09853069B2 Method for manufacturing semiconductor device 有权
公开(公告)号：US09853069B2
公开(公告)日：2017-12-26
申请号：US15629970
申请日：2017-06-22
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L29/10 , H01L29/12 , H01L27/12 , H01L29/786 , H01L27/32 , G11C19/28 , G09G3/36 , G02F1/1343 , G02F1/1362 , G02F1/167 , G09F21/04
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.

5. 发明授权

US09691789B2 Method for manufacturing semiconductor device 有权
公开(公告)号：US09691789B2
公开(公告)日：2017-06-27
申请号：US15180642
申请日：2016-06-13
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L29/10 , H01L29/12 , H01L27/12 , H01L21/465 , H01L29/66 , H01L29/786
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.

6. 发明授权

US09076825B2 Semiconductor device and method for manufacturing the semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09076825B2
公开(公告)日：2015-07-07
申请号：US14162364
申请日：2014-01-23
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Yoshiaki Yamamoto , Koichi Ito , Motomu Kurata , Taiga Muraoka , Daigo Ito
IPC分类号： H01L29/10 , H01L29/66 , H01L29/786
CPC分类号： H01L29/66969 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.
摘要翻译：当氧化物半导体膜被微细化以具有岛状时，通过使用硬掩模，可以抑制氧化物半导体膜的端部的不均匀性。具体地，在氧化物半导体膜上形成硬掩模，在硬掩模上形成抗蚀剂，进行曝光以形成抗蚀剂掩模，使用抗蚀剂掩模作为掩模来处理硬掩模，氧化物半导体膜为使用处理后的硬掩模作为掩模处理，除去抗蚀剂掩模和加工的硬掩模，形成与处理的氧化物半导体膜接触的源电极和漏电极，在源极上形成栅极绝缘膜，漏电极和栅电极形成在栅极绝缘膜上方，栅电极与氧化物半导体膜重叠。

7. 发明授权

US10347769B2 Thin film transistor with multi-layer source/drain electrodes 有权
公开(公告)号：US10347769B2
公开(公告)日：2019-07-09
申请号：US14204365
申请日：2014-03-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Shinya Sasagawa , Motomu Kurata , Taiga Muraoka
IPC分类号： H01L29/417 , H01L29/786 , H01L29/45 , H01L21/02
摘要： A semiconductor device for miniaturization is provided. The semiconductor device includes a semiconductor layer; a first electrode and a second electrode that are on the semiconductor layer and apart from each other over the semiconductor layer; a gate electrode over the semiconductor layer; and a gate insulating layer between the semiconductor layer and the gate electrode. The first and second electrodes comprise first conductive layers and second conductive layers. In a region overlapping with the semiconductor layer, the second conductive layers are positioned between the first conductive layers, and side surfaces of the second conductive layers are in contact with side surfaces of the first conductive layers. The second conductive layers have smaller thicknesses than those of the first conductive layers, and the top surface levels of the second conductive layers are lower than those of the first conductive layers.

8. 发明授权

US09929407B2 Negative electrode for non-aqueous secondary battery, non-aqueous secondary battery, and manufacturing methods thereof 有权
公开(公告)号：US09929407B2
公开(公告)日：2018-03-27
申请号：US13721093
申请日：2012-12-20
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Kazuki Tanemura , Toshihiko Takeuchi , Taiga Muraoka
IPC分类号： H01M4/70 , H01M4/134 , H01M4/1395 , B82Y40/00 , H01M4/36 , H01M4/38 , H01M4/66
CPC分类号： H01M4/70 , B82Y40/00 , H01M4/134 , H01M4/1395 , H01M4/366 , H01M4/386 , H01M4/661
摘要： A non-aqueous secondary battery which has high charge-discharge capacity, can be charged and discharged at high speed, and has little deterioration in battery characteristics due to charge and discharge is provided. A negative electrode includes a current collector and an active material layer. The current collector includes a plurality of protrusion portions extending in a substantially perpendicular direction and a base portion connected to the plurality of protrusion portions. The protrusion portions and the base portion are formed using the same material containing titanium. Top surfaces and side surfaces of the protrusion portions and a top surface of the base portion are covered with the active material layer. The active material layer includes a plurality of whiskers. The active material layer may be covered with graphene.

9. 发明授权

US09373525B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US09373525B2
公开(公告)日：2016-06-21
申请号：US14548955
申请日：2014-11-20
申请人： Semiconductor Energy Laboratory Co., Ltd.
发明人： Hideomi Suzawa , Shinya Sasagawa , Taiga Muraoka
IPC分类号： H01L21/00 , H01L21/16 , H01L21/465 , H01L27/12 , H01L29/786 , H01L29/66
CPC分类号： H01L27/127 , G02F1/134309 , G02F1/136227 , G02F1/167 , G09F21/04 , G09G3/3648 , G09G3/3677 , G09G2300/0408 , G09G2300/0809 , G09G2310/0251 , G09G2310/0286 , G09G2310/08 , G11C19/28 , H01L21/465 , H01L27/1225 , H01L27/124 , H01L27/3262 , H01L29/66969 , H01L29/7869 , H01L29/78696
摘要： An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
摘要翻译：本发明的目的是建立一种其中使用氧化物半导体的半导体器件的制造中的加工技术。在基板上形成栅电极，在栅电极上形成栅极绝缘层，在栅极绝缘层上形成氧化物半导体层，通过湿蚀刻加工氧化物半导体层，形成岛状氧化物半导体层形成导电层以覆盖岛状氧化物半导体层，通过干蚀刻处理导电层以形成源极，并且通过干蚀刻除去漏电极和岛状氧化物半导体层的一部分，在岛状氧化物半导体层中形成凹部。

10. 发明申请

US20140287552A1 METHOD FOR PROCESSING THIN FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：用于处理薄膜的方法和制造半导体器件的方法
公开(公告)号：US20140287552A1
公开(公告)日：2014-09-25
申请号：US14219111
申请日：2014-03-19
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
发明人： Taiga Muraoka , Motomu Kurata , Shinya Sasagawa , Katsuaki Tochibayashi
IPC分类号： H01L21/70 , H01L29/66 , H01L21/02
CPC分类号： H01L21/02554 , H01L21/0212 , H01L21/02274 , H01L21/02381 , H01L21/02488 , H01L21/02565 , H01L21/02667 , H01L21/0337 , H01L21/31138 , H01L21/32136 , H01L21/32139 , H01L29/66969 , H01L29/7869
摘要： A stable and minute processing method of a thin film is provided. Further, a miniaturized semiconductor device is provided. A method for processing a thin film includes the following steps: forming a film to be processed over a formation surface; forming an organic coating film over the film to be processed; forming a resist film over the organic coating film; exposing the resist film to light_or_an electron beam; removing part of the resist film by development to expose part of the organic coating film; depositing an organic material layer on the top surface and a side surface of the resist film by plasma treatment; etching part of the organic coating film using the resist film and the organic material layer as masks to expose part of the film to be processed; and etching part of the film to be processed using the resist film and the organic material layer as masks.
摘要翻译：提供了薄膜的稳定和微小的加工方法。此外，提供了一种小型化的半导体器件。一种处理薄膜的方法包括以下步骤：在地层表面上形成待处理的薄膜; 在待处理的膜上形成有机涂膜; 在有机涂膜上形成抗蚀膜; 将抗蚀剂膜暴露于light_or_an电子束; 通过显影去除部分抗蚀剂膜以暴露部分有机涂膜; 通过等离子体处理在抗蚀剂膜的顶表面和侧表面上沉积有机材料层; 使用所述抗蚀剂膜和所述有机材料层作为掩模蚀刻所述有机涂膜的一部分，以暴露待处理膜的部分; 并使用抗蚀剂膜和有机材料层作为掩模蚀刻待处理的膜的一部分。

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