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1. 发明申请

US20230120126A1 Method for Measuring Stitching Overlay Accuracy of Image Sensor Stitching Manufacturing 有权
公开(公告)号：US20230120126A1
公开(公告)日：2023-04-20
申请号：US17893425
申请日：2022-08-23
申请人： Shanghai Huali Microelectronics Corporation
发明人： Yu Zhang , Xiaobin Zhu , Xiaolong Wang
IPC分类号： G03F7/20 , H01L27/146
摘要： The present application discloses a method for measuring stitching overlay accuracy of image sensor stitching manufacturing, forming an A-type overlay pattern mark and a corresponding B-type overlay pattern mark on the edge of each rectangular pixel area to be stitched; after the A-type overlay pattern mark and the B-type overlay pattern mark are stitched and exposed, performing metrology by means of a scanning electron microscope to obtain dimension features; and according to the dimension features of the A-type overlay pattern mark and the B-type overlay pattern mark stitched together and exposed and measured by the scanning electron microscope, determining stitching overlay accuracy of two adjacent rectangular pixel areas. The present application can achieve direct metrology on the overlay pattern mark on the stitched pixel area of a product, facilitating timely and accurate monitoring on the stitching overlay accuracy of image sensor stitching manufacturing.

2. 发明授权

US09449866B2 Methods and systems for using oxidation layers to improve device surface uniformity 有权
标题翻译：使用氧化层改善器件表面均匀性的方法和系统
公开(公告)号：US09449866B2
公开(公告)日：2016-09-20
申请号：US14590011
申请日：2015-01-06
申请人： Shanghai Huali Microelectronics Corporation
发明人： Quanbo Li , Jun Huang , Xiangguo Meng , Yu Zhang
IPC分类号： H01L21/76 , H01L21/762 , H01L21/302 , H01L21/3065 , H01L21/02 , H01L21/311
CPC分类号： H01L21/76205 , H01L21/02057 , H01L21/02238 , H01L21/02252 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/302 , H01L21/3065 , H01L21/31116 , H01L29/165 , H01L29/66636 , H01L29/7848
摘要： The invention discloses a treatment process for a semiconductor, comprising providing a substrate, the substrate comprises silicon material; defining a trench region; removing the trench region using a plasma etching process and exposing a trench surface, the trench surface comprising surface defects; forming an oxidation layer overlaying the trench surface; removing the oxidation layer and at least a portion of the surface defects; expositing a treated trench surface, the treated trench surface being substantially free from surface defects; and forming a layer of silicon germanium material overlaying the treated trench surface. The invention further provides a semiconductor processing technique used to eliminate or reduce dislocation defect on the semiconductor device and improve device performance. In the treatment process, a substrate is subjected to at least one oxidation-deoxidation processes, where an oxidation layer is formed and then removed.
摘要翻译：本发明公开了一种用于半导体的处理方法，包括提供衬底，所述衬底包括硅材料; 限定沟槽区域; 使用等离子体蚀刻工艺去除沟槽区域并暴露沟槽表面，沟槽表面包括表面缺陷; 形成覆盖所述沟槽表面的氧化层; 去除氧化层和至少一部分表面缺陷; 展开经处理的沟槽表面，处理的沟槽表面基本上没有表面缺陷; 以及形成覆盖处理过的沟槽表面的硅锗材料层。本发明还提供了用于消除或减少半导体器件上的位错缺陷并提高器件性能的半导体处理技术。在处理过程中，对基材进行至少一种氧化 - 脱氧工艺，其中形成氧化层然后除去。

3. 发明申请

US20150270127A1 METHODS AND SYSTEMS FOR USING OXIDATION LAYERS TO IMPROVE DEVICE SURFACE UNIFORMITY 有权
标题翻译：使用氧化层提高器件表面均匀性的方法和系统
公开(公告)号：US20150270127A1
公开(公告)日：2015-09-24
申请号：US14590011
申请日：2015-01-06
申请人： Shanghai Huali Microelectronics Corporation
发明人： Quanbo Li , Jun Huang , Xiangguo Meng , Yu Zhang
IPC分类号： H01L21/02 , H01L21/762
CPC分类号： H01L21/76205 , H01L21/02057 , H01L21/02238 , H01L21/02252 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/302 , H01L21/3065 , H01L21/31116 , H01L29/165 , H01L29/66636 , H01L29/7848
摘要： The invention discloses a treatment process for a semiconductor, comprising providing a substrate, the substrate comprises silicon material; defining a trench region; removing the trench region using a plasma etching process and exposing a trench surface, the trench surface comprising surface defects; forming an oxidation layer overlaying the trench surface; removing the oxidation layer and at least a portion of the surface defects; expositing a treated trench surface, the treated trench surface being substantially free from surface defects; and forming a layer of silicon germanium material overlaying the treated trench surface. The invention further provides a semiconductor processing technique used to eliminate or reduce dislocation defect on the semiconductor device and improve device performance. In the treatment process, a substrate is subjected to at least one oxidation-deoxidation processes, where an oxidation layer is formed and then removed.
摘要翻译：本发明公开了一种用于半导体的处理方法，包括提供衬底，所述衬底包括硅材料; 限定沟槽区域; 使用等离子体蚀刻工艺去除沟槽区域并暴露沟槽表面，沟槽表面包括表面缺陷; 形成覆盖所述沟槽表面的氧化层; 去除氧化层和至少一部分表面缺陷; 展开经处理的沟槽表面，处理的沟槽表面基本上没有表面缺陷; 以及形成覆盖处理过的沟槽表面的硅锗材料层。本发明还提供了用于消除或减少半导体器件上的位错缺陷并提高器件性能的半导体处理技术。在处理过程中，对基材进行至少一种氧化 - 脱氧工艺，其中形成氧化层然后除去。

4. 发明授权

US08735300B1 Method of forming contact hole 有权
标题翻译：形成接触孔的方法
公开(公告)号：US08735300B1
公开(公告)日：2014-05-27
申请号：US13730486
申请日：2012-12-28
申请人： Shanghai Huali Microelectronics Corporation
发明人： Yu Zhang , Jun Huang , Chenguang Gai
IPC分类号： H01L21/00
CPC分类号： H01L21/76802 , H01L21/31144 , H01L21/76816
摘要： A method of forming contact hole is disclosed, including the steps of: providing a semiconductor substrate having a first dielectric layer, a second dielectric layer and a third dielectric layer formed thereon in this order; forming a first contact hole through the third dielectric layer, the second dielectric layer and the first dielectric layer by using an etching process to expose the semiconductor substrate; removing the third dielectric layer; forming a fourth dielectric layer over the second dielectric layer, the fourth dielectric layer filling the first contact hole; forming a second contact hole through the fourth dielectric layer, the second dielectric layer and the first dielectric layer to expose the semiconductor substrate; and removing the fourth dielectric layer. The method is capable of improving the stability of the contact-hole formation process.
摘要翻译：公开了一种形成接触孔的方法，包括以下步骤：提供具有依次形成在其上的第一电介质层，第二电介质层和第三电介质层的半导体衬底; 通过使用蚀刻工艺来形成通过第三介电层，第二介电层和第一介电层的第一接触孔，以暴露半导体衬底; 去除第三介电层; 在所述第二电介质层上形成第四电介质层，所述第四电介质层填充所述第一接触孔; 通过所述第四电介质层，所述第二电介质层和所述第一介电层形成第二接触孔，以暴露所述半导体衬底; 并移除第四介质层。该方法能够提高接触孔形成过程的稳定性。

5. 发明申请

US20140357056A1 METHOD OF FORMING SIGMA-SHAPED TRENCH 审中-公开
标题翻译：形成SIGMA形状TRENCH的方法
公开(公告)号：US20140357056A1
公开(公告)日：2014-12-04
申请号：US14092235
申请日：2013-11-27
申请人： Shanghai Huali Microelectronics Corporation
发明人： Quanbo Li , Yu Zhang , Jun Huang , Shu Koon Pang
IPC分类号： H01L21/3065 , H01L21/02
CPC分类号： H01L21/3065 , H01L21/02381 , H01L21/02532 , H01L21/02658 , H01L21/3086 , H01L21/31116 , H01L29/66636 , H01L29/7848
摘要： A method of forming a Σ-shaped trench is disclosed. The method includes: providing a silicon substrate; and performing a plasma etching process to form a Σ-shaped trench in the silicon substrate. The plasma etching process includes: etching the silicon substrate using a first plasma etching gas including a sulphur-containing fluoride; and etching the silicon substrate using a second plasma etching gas including a sulphur-containing fluoride and a polymer gas. A method of forming a semiconductor device is also disclosed.
摘要翻译：公开了一种形成沟槽的方法。该方法包括：提供硅衬底; 并进行等离子体蚀刻工艺，以在硅衬底中形成一个“S”形沟槽。等离子体蚀刻工艺包括：使用包括含硫氟化物的第一等离子体蚀刻气体来蚀刻硅衬底; 以及使用包括含硫氟化物和聚合物气体的第二等离子体蚀刻气体来蚀刻硅衬底。还公开了一种形成半导体器件的方法。

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