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1. 发明申请

US20210305265A1 STACK CAPACITOR, A FLASH MEMORY DEVICE AND A MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20210305265A1
公开(公告)日：2021-09-30
申请号：US17213885
申请日：2021-03-26
申请人： SHANGHAI HUALI MICROELECTRONICS CORPORATION
发明人： Zhi Tian , Juanjuan LI , Hua SHAO , Haoyu CHEN
IPC分类号： H01L27/11536 , H01L49/02 , H01L27/06 , H01L29/66 , H01L29/788 , H01L27/11539
摘要： The present disclosure provides a stack capacitor, a flash memory device, and a manufacturing method thereof. The stack capacitor of the flash memory device has a a memory transistor structure which at least comprises a substrate, and a tunneling oxide layer, a floating gate layer, an interlayer dielectric layer and a control gate layer which are sequentially stacked on the substrate, the interlayer dielectric layer of the stack capacitor comprises a first oxide layer and a nitride layer; the stack capacitor further comprises a first contact leading out of the control gate layer and a second contact leading out of the floating gate layer. The capacitance per unit area of the stack capacitor provided by the disclosure is effectively improved, and the size of the transistor device is reduced. The manufacturing method according to the disclosure does not add any additional photomask than a conventional process flow.

2. 发明授权

US10804302B2 Pixel structure and manufacturing method therefor 有权
公开(公告)号：US10804302B2
公开(公告)日：2020-10-13
申请号：US16203628
申请日：2018-11-29
申请人： Shanghai Huali Microelectronics Corporation
发明人： Zhi Tian
IPC分类号： H01L27/146
摘要： The present disclosure provides a pixel structure for a CMOS image sensor and a manufacturing method therefor, the pixel structure comprising a photo diode and a source follow transistor, and an isolation strip is provided between the photo diode and the source follow transistor, and a contact hole is provided in a drain terminal of the source follow transistor, with the width of a part, corresponding to the contact hole portion, of a drain terminal active area of the source follow transistor being smaller than the width of the rest of the drain terminal active area, so that the width of a part, corresponding to the contact hole portion, of the isolation strip is greater than the width of a part, corresponding to the rest of the drain terminal active area, of the isolation strip.

3. 发明申请

US20230136097A1 ReRAM Device and Method for Manufacturing the Same 有权
公开(公告)号：US20230136097A1
公开(公告)日：2023-05-04
申请号：US17953472
申请日：2022-09-27
申请人： Shanghai Huali Microelectronics Corporation
发明人： Zhi Tian , Haoyu Chen , Hua Shao
IPC分类号： H01L27/24 , H01L45/00
摘要： The present application discloses a ReRAM device, the bottom surface of a first resistance switching layer is connected with a bottom electrode, and a first groove is formed in the center of the top surface of the first resistance switching layer. A second resistance switching layer is formed on the first resistance switching layer, the center of the bottom surface of the second resistance switching layer is filled downwards into the first groove, and the top surface of the second resistance switching layer is connected with a top electrode. The material of the second resistance switching layer is more conductive than the material of the first resistance switching layer. The present application can maintain the stability of the central conductive filament in the low resistance state. The present application further discloses a method for manufacturing the ReRAM device.

4. 发明申请

US20220060650A1 Global Shutter CMOS Image Sensor and Method for Making the Same 有权
公开(公告)号：US20220060650A1
公开(公告)日：2022-02-24
申请号：US16951606
申请日：2020-11-18
申请人： Shanghai Huali Microelectronics Corporation
发明人： Zhi Tian , Zhen Gu , Hua Shao , Haoyu Chen
IPC分类号： H04N5/3745 , H04N5/353 , H01L27/146
摘要： The disclosure discloses a global shutter CMOS image sensor, which adopts non-uniform storage diffusion region doping to reduce the junction leakage at storage points, so as to ensure that with the increase of the depth of photodiodes and the increase of pixels, all carriers in rows read subsequently can be transferred to storage diffusion regions, the loss of the carriers in the storage diffusion regions is not caused when a global shutter transistor is turned on, and the carriers can be completely transferred from the storage diffusion regions to floating diffusion regions through second transfer transistors even if the number of rows of pixel units increases during reading-out row by row. The disclosure further discloses a method for making the global shutter CMOS image sensor.

5. 发明申请

US20220059598A1 Method for Detecting Depth of Vertical Gate of Transfer Transistor of CMOS Image Sensor 有权
公开(公告)号：US20220059598A1
公开(公告)日：2022-02-24
申请号：US16951038
申请日：2020-11-18
申请人： Shanghai Huali Microelectronics Corporation
发明人： Zhi Tian , Juanjuan Li , Hua Shao , Haoyu Chen
IPC分类号： H01L27/146 , H01L27/148
摘要： The disclosure discloses a method for detecting the depth of a vertical gate of a transfer transistor of a CMOS image sensor. The effective electrical thickness of planar gate polysilicon of a transfer transistor of a reference CMOS image sensor is obtained through a planar test, the capacitance of a vertical gate structure of a transfer transistor of a to-be-tested CMOS image sensor is obtained through a vertical test, and then the equivalent depth of the vertical gate of the transfer transistor of the to-be-tested CMOS image sensor is calculated accordingly. The depth of the gates of the transfer transistors of all CMOS image sensors can be monitored on line without damaging a silicon wafer, it is conducive to finding the abnormality of the depth of the gates of the transfer transistors in time, and the product quality of the CMOS image sensor can be effectively monitored.

6. 发明授权

US09123619B2 Method for inhibiting the electric crosstalk of back illuminated CMOS image sensor 有权
标题翻译：抑制背照式CMOS图像传感器的电串扰的方法
公开(公告)号：US09123619B2
公开(公告)日：2015-09-01
申请号：US14098017
申请日：2013-12-05
申请人： SHANGHAI HUALI MICROELECTRONICS CORPORATION
发明人： Zhi Tian , QiuMin Jin
IPC分类号： H01L21/00 , H01L27/146
CPC分类号： H01L27/14689 , H01L27/14609
摘要： The present invention discloses a method for inhibiting the electric crosstalk of back illuminated CMOS image sensor. This invention comprises, two ion implanting layers are implanted at the different area of the backside of the pixel unit after the thickness of the backside of CMOS image sensor is reduced. The ion concentrations implanted into the two layers are controlled to decrease progressively from top to bottom. An electric field is formed from top to bottom inside the epitaxial layer. The said electric field absorbs the incident light which arrives at the substrate region outside of the space charge of the photodiode. It reduces the electron diffuses in different pixels. Consequently, it reduces the electric crosstalk of pixels, improves the manufacture process and improve the image quality of the of CMOS image sensor.
摘要翻译：本发明公开了一种抑制背照式CMOS图像传感器的电串扰的方法。本发明包括：在CMOS图像传感器的背面的厚度减小之后，将两个离子注入层注入到像素单元的背面的不同区域。控制注入两层的离子浓度从上到下逐渐降低。在外延层内部从上到下形成电场。所述电场吸收到达光电二极管的空间电荷之外的衬底区域的入射光。它可以减少不同像素的电子扩散。因此，它减少了像素的电串扰，改善了CMOS图像传感器的制造工艺和图像质量。

7. 发明授权

US08659071B2 Method and structure to improve the erasing speed operation of SONOS memory device having a graded silicon nitride layer 有权
标题翻译：具有梯度氮化硅层的SONOS存储器件的擦除速度操作的方法和结构
公开(公告)号：US08659071B2
公开(公告)日：2014-02-25
申请号：US13721078
申请日：2012-12-20
申请人： Shanghai Huali Microelectronics Corporation
发明人： Zhi Tian
IPC分类号： H01L29/66
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/513 , H01L29/518
摘要： The invention provides a SONOS structure, a manufacturing method thereof and a semiconductor device with the SONOS structure. The SONOS structure comprises: a first tunneling oxide layer formed on a substrate, a charge storage silicon nitride layer, a second silicon oxide layer, a thin graded silicon nitride layer having graded Si/N content formed on the second silicon oxide layer, a third silicon oxide layer formed on the thin graded silicon nitride layer, and a polysilicon control gate. The Si/N content ratio of the silicon nitride of the thin graded silicon nitride layer increases gradually, wherein the silicon nitride of the graded silicon nitride layer closer to the second silicon oxide layer contains higher nitride content, and the silicon nitride of the graded silicon nitride layer closer to the third silicon oxide layer contains higher silicon content.
摘要翻译：本发明提供了SONOS结构，其制造方法和具有SONOS结构的半导体器件。 SONOS结构包括：形成在衬底上的第一隧道氧化物层，电荷存储氮化硅层，第二氧化硅层，在第二氧化硅层上形成的具有分级的Si / N含量的薄梯度氮化硅层，形成在薄梯度氮化硅层上的氧化硅层和多晶硅控制栅极。薄梯度氮化硅层的氮化硅的Si / N含量比逐渐增加，其中更靠近第二氧化硅层的梯度氮化硅层的氮化硅含有较高的氮化物含量，并且分级硅的氮化硅更靠近第三氧化硅层的氮化物层含有较高的硅含量。

8. 发明授权

US11437387B2 Stack capacitor, a flash memory device and a manufacturing method thereof 有权
公开(公告)号：US11437387B2
公开(公告)日：2022-09-06
申请号：US17213885
申请日：2021-03-26
申请人： SHANGHAI HUALI MICROELECTRONICS CORPORATION
发明人： Zhi Tian , Juanjuan Li , Hua Shao , Haoyu Chen
IPC分类号： H01L21/00 , H01L27/11536 , H01L27/06 , H01L27/11539 , H01L49/02 , H01L29/66 , H01L29/788
摘要： The present disclosure provides a stack capacitor, a flash memory device, and a manufacturing method thereof. The stack capacitor of the flash memory device has a a memory transistor structure which at least comprises a substrate, and a tunneling oxide layer, a floating gate layer, an interlayer dielectric layer and a control gate layer which are sequentially stacked on the substrate, the interlayer dielectric layer of the stack capacitor comprises a first oxide layer and a nitride layer; the stack capacitor further comprises a first contact leading out of the control gate layer and a second contact leading out of the floating gate layer. The capacitance per unit area of the stack capacitor provided by the disclosure is effectively improved, and the size of the transistor device is reduced. The manufacturing method according to the disclosure does not add any additional photomask than a conventional process flow.

9. 发明授权

US11322506B2 Semiconductor structure of split gate flash memory cell and method for manufacturing the same 有权
公开(公告)号：US11322506B2
公开(公告)日：2022-05-03
申请号：US16861967
申请日：2020-04-29
申请人： Shanghai Huali Microelectronics Corporation
发明人： Lei Zhang , Tao Hu , Xiaochuan Wang , Zhi Tian , Qiwei Wang , Haoyu Chen
IPC分类号： H01L27/11524 , H01L21/265 , H01L21/8234 , H01L29/423 , H01L29/66 , H01L27/11517 , H01L29/788 , H01L21/04 , H01L21/28
摘要： The present invention provides a semiconductor structure for a split gate flash memory cell and a method of manufacturing the same. The split gate flash memory cell provided by the present invention at least includes a select gate and a floating gate formed on the substrate, one side of the select gate is formed with an isolation wall, and the floating gate is on the other side of the isolation wall. An ion implantation region is formed in an upper portion of the substrate below the isolation wall, wherein the ion implantation type of the ion implantation region is different from the ion implantation type of the substrate. The invention also provides a manufacturing method for manufacturing the above-mentioned split gate flash memory cell, and the manufacturing method provided by the invention can be compatible with the existing manufacturing process of the split gate flash memory cell without increasing the process cost and the process complexity. The manufactured split gate flash memory cell can reduce the influence of the channel inversion region on the channel current, thereby improving the characteristics of the channel current of the flash cell and optimizing the device performance.

10. 发明授权

US11282874B2 Global shutter CMOS image sensor having photosensitive doped region with inhomogeneous potentials 有权
公开(公告)号：US11282874B2
公开(公告)日：2022-03-22
申请号：US16692832
申请日：2019-11-22
申请人： Shanghai Huali Microelectronics Corporation
发明人： Haoyu Chen , Zhi Tian , Qiwei Wang , Hua Shao
IPC分类号： H01L27/146
摘要： The invention discloses a global shutter CMOS image sensor. Each pixel unit of the global shutter CMOS image sensor includes a photo diode, a storage region and a first reset region, wherein the photo diode includes a first photosensitive doped region; a gate structure of a first transfer transistor is formed between the storage region and the first photosensitive doped region; a gate structure of a global shutter transistor is formed between the first reset region and the first photosensitive doped region; and inhomogeneous potentials are formed in the first photosensitive doped region through a doping structure. According to the invention, photo-induced carriers in the PDs of the pixel units, especially photo-induced carriers in the PDs of large pixel units, can be simultaneously and completely transferred to the storage region and the first reset region, and the overall performance of the device is improved.

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