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    • 3. 发明申请
    • Inter-communication mobile phone set
    • 互通手机套
    • US20050059429A1
    • 2005-03-17
    • US10662413
    • 2003-09-16
    • Sheng LiuSheng Liu
    • Sheng LiuSheng Liu
    • H04M1/05H04M1/21H04M1/725H04M1/00
    • H04M1/72513H04M1/05H04M1/21
    • An inter-communication mobile phone set comprises a main phone, a SIM card and a plurality of sub-phones. The main phone is one of a multi-user main phone, a personal main phone, and an in-car main phone; the multi-user main phone, personal main phone and in-car main phone searching for sub-phones automatically and the frequencies thereof so that signals of the main phone and sub-phones can inter-communicate to one another. The main phone is connected to other main phone through a SIM card. The sub-phone has a type selected from one of a simple type, a pen-form sub-phone, a neck-tie form phone, a watch form sub-phone, a breast-suspending sub-phone, an ear-phone form sub-phone, a hat form sub-phone. The sub-phone is built in one of a portable audio, a translator, a notebook computer, a PDA, a personal computer expansion card, a pocket, a game machine, a camera.
    • 一种互通式移动电话机包括主电话机,SIM卡和多个子电话机。 主要手机是多用户主要手机,个人主要手机和车载主要手机之一, 多用户主电话,个人主电话和车内主要手机自动搜索子电话及其频率,使得主电话和子电话的信号可以相互通信。 主要手机通过SIM卡连接到其他主要手机。 子电话具有从简单类型,笔式子电话,领带形式电话,表格子电话,挂号子电话,耳机形式之一中选择的类型 子手机,帽子形式的分机。 子电话内置在便携式音频,翻译器,笔记本电脑,PDA,个人计算机扩展卡,口袋,游戏机,照相机之一中。
    • 7. 发明申请
    • INTERFERENCE ELIMINATION METHOD AND DATA TRANSMITTING APPARATUS
    • 干扰消除方法和数据传输装置
    • US20120051459A1
    • 2012-03-01
    • US13293774
    • 2011-11-10
    • Sheng Liu
    • Sheng Liu
    • H04L25/49
    • H04L25/03343H04B7/0413H04B7/0617H04L2025/03426
    • An interference elimination method provided herein includes: the ith transmitter of a group transmitters obtains an interference vector of each user, where: the interference vector of the kth user is Hkiwim; obtains at least L−N linear combinations for each user, wherein: the linear combination includes linear combinations of aligned interference vectors and linear combinations of N−Lk interference vectors, N is the number of receiving antennas of the user, and L is a sum of the signal flows of all users; the pre-coding vectors of all transmitters is obtained according to the linear combinations of all users; and the signals pre-coded using the pre-coding vectors are sent. Accordingly, a data transmitting apparatus is provided herein.
    • 本文提供的干扰消除方法包括:组发射机的第i个发射机获取每个用户的干扰矢量,其中:第k个用户的干扰矢量是Hkiwim; 为每个用户获得至少L-N个线性组合,其中:线性组合包括对齐干扰矢量的线性组合和N-Lk个干扰矢量的线性组合,N是用户的接收天线的数量,L是总和 的所有用户的信号流; 根据所有用户的线性组合获得所有发射机的预编码向量; 并且发送使用预编码矢量预编码的信号。 因此,本文提供了一种数据发送装置。
    • 8. 发明申请
    • Multi-Port Memory Using Single-Port Memory Cells
    • 使用单端口存储单元的多端口存储器
    • US20110310691A1
    • 2011-12-22
    • US13153392
    • 2011-06-04
    • Ting ZhouEphrem WuSheng LiuHyuck Jin Kwon
    • Ting ZhouEphrem WuSheng LiuHyuck Jin Kwon
    • G11C8/16
    • G11C8/16G06F12/06G11C7/1075Y02D10/13
    • A memory operative to provide multi-port functionality includes multiple single-port memory cells forming a first memory array. The first memory array is organized into multiple memory banks, each of the memory banks comprising a corresponding subset of the single-port memory cells. The memory further includes a second memory array including multiple multi-port memory cells and is operative to track status information of data stored in corresponding locations in the first memory array. At least one cache memory is connected with the first memory array and is operative to store data for resolving concurrent read and write access conflicts in the first memory array. The memory includes a controller operative: to receive the status information and to determine a validity of data stored in the first memory array as a function of the status information; to control a manner in which data is stored in the memory for avoiding data overflow in the cache memory; and to resolve concurrent read and write access conflicts in the first memory array during the same memory cycle.
    • 可操作以提供多端口功能的存储器包括形成第一存储器阵列的多个单端口存储器单元。 第一存储器阵列被组织成多个存储器组,每个存储器组包括单端口存储器单元的相应子集。 存储器还包括包括多个多端口存储器单元的第二存储器阵列,并且可操作以跟踪存储在第一存储器阵列中相应位置中的数据的状态信息。 至少一个高速缓存存储器与第一存储器阵列连接,并且可操作地存储用于解决第一存储器阵列中的并发读和写访问冲突的数据。 存储器包括控制器,其操作:接收状态信息并根据状态信息确定存储在第一存储器阵列中的数据的有效性; 以控制数据存储在存储器中以避免高速缓冲存储器中的数据溢出的方式; 并在同一个内存周期内解决第一个内存阵列中的并发读写访问冲突。
    • 9. 发明授权
    • Method and system of signal transmission in base transceiver station based on remote radio head
    • 基站收发台基于远程无线电头的信号传输方法与系统
    • US07822075B2
    • 2010-10-26
    • US11547699
    • 2004-04-09
    • Sheng Liu
    • Sheng Liu
    • H04J3/02
    • H04J3/1617H04J3/1658H04J2203/0035H04W88/08H04W92/10
    • The invention relates to a method of signal transmission between a host BTS and Remote Radio Unit(s), and the BTS communication system thereof. The transmission channel between the host BTS and the Remote Radio Unit(s) uses wideband transmission links or a network, the method includes the following steps of: performing the transmission over the transmission channel using a Synchronous Digital Hierarchy (SDH)/Optical Transmission Network (OTN), forming a digital wireless signal data stream and an in-band control signaling stream transmitted over the transmission channel into a Generic Framing Procedure (GFP) frame which is further mapped to a STM-N/OTM-n frame, thereby multiplexing the digital wireless signal data stream and the in-band control signaling stream to realize SDH/OTN-based transmission. As a result, the wireless signal can be effectively transmitted between the RRH and the host BTS without specific transmission network, and the management and maintenance operation required by the signal transmission and the networking cost can be reduced.
    • 本发明涉及一种主机BTS和远程无线电单元之间的信号传输方法及其BTS通信系统。 主机BTS和远程无线电单元之间的传输通道使用宽带传输链路或网络,该方法包括以下步骤:使用同步数字体系(SDH)/光传输网络在传输信道上执行传输 (OTN),形成数字无线信号数据流和通过传输信道传输的带内控制信令流,进一步映射到STM-N / OTM-n帧的通用成帧过程(GFP)帧,由此复用 数字无线信号数据流和带内控制信令流,实现基于SDH / OTN的传输。 结果,可以在RRH和主机BTS之间有效地传输无线信号,而无需特定的传输网络,可以减少信号传输所需的管理和维护操作以及联网成本。
    • 10. 发明申请
    • HIGH SPEED PACKET FIFO OUTPUT BUFFERS FOR SWITCH FABRIC WITH SPEEDUP
    • 高速分组FIFO输出缓冲器,用于开关转换
    • US20100238938A1
    • 2010-09-23
    • US12729231
    • 2010-03-22
    • Ting ZhouSheng LiuEphrem Wu
    • Ting ZhouSheng LiuEphrem Wu
    • H04L12/56
    • H04L49/10
    • Described embodiments provide a first-in, first-out (FIFO) buffer for packet switching in a crossbar switch with a speedup factor of m. The FIFO buffer comprises a first logic module that receives m N-bit data portions from a switch fabric, the m N-bit data portions comprising one or more N-bit data words of one or more data packets. A plurality of one-port memories store the received data portions. Each one-port memory has a width W segmented into S portions of width W/S, where W/S is related to N. A second logic module provides one or more N-bit data words, from the one-port memories, corresponding to the received m N-bit data portions. In a sequence of clock cycles, the data portions are alternately transferred from corresponding segments of the one-port memories in a round-robin fashion, and, for each clock cycle, the second logic module constructs data out read from the one-port memories.
    • 所描述的实施例提供了具有加速因子m的交叉开关中的分组交换的先入先出(FIFO)缓冲器。 FIFO缓冲器包括从交换结构接收m个N位数据部分的第一逻辑模块,m个N位数据部分包括一个或多个数据分组的一个或多个N位数据字。 多个单端口存储器存储所接收的数据部分。 每个单端口存储器具有分段宽度W / S的S个部分的宽度W,其中W / S与N相关。第二逻辑模块从单端口存储器提供一个或多个N位数据字,对应于 到所接收的m个N位数据部分。 在时钟周期的顺序中,数据部分以循环方式从单端口存储器的相应段交替传送,并且对于每个时钟周期,第二逻辑模块构造从单端口存储器读出的数据 。