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1. 发明申请

US20220116249A1 TRANSMITTER FOR DUAL COMMUNICATION OVER AN ISOLATION CHANNEL 有权
公开(公告)号：US20220116249A1
公开(公告)日：2022-04-14
申请号：US17066244
申请日：2020-10-08
申请人： Silicon Laboratories Inc.
发明人： Carlos Jesus Briseno-Vidrios , Michael R. May , Patrick De Bakker , Fernando Naim Lavalle Aviles
IPC分类号： H04L27/04 , H04L27/06 , H04L27/08
摘要： An isolated gate driver includes a first input terminal to receive gate information and one or more input terminals to receive configuration information. A modulation circuit generates a modulated signal having four possible states, each of the four possible states corresponding to a different unique pair of values of the gate information and the configuration information. The modulation circuit represents two of the states using on-off keying (OOK) while the configuration information is at a first value and represents two of the states as a modification to the OOK modulation based on the configuration information being at a second value. The modulated signal is sent over an isolation communication channel coupling a transmitter and receiver of the isolated gate driver.

2. 发明授权

US11144104B2 Mode selection circuit for low-cost integrated circuits such as microcontrollers 有权
公开(公告)号：US11144104B2
公开(公告)日：2021-10-12
申请号：US16791210
申请日：2020-02-14
申请人： Silicon Laboratories Inc.
发明人： Rex Tak Ying Wong , Michael R. May , Pio Balmelli
IPC分类号： G06F1/26 , G06F13/40 , G01R19/165 , G06F11/22
摘要： In one form, an integrated circuit includes a negative voltage detector circuit and a logic circuit. The negative voltage detector circuit has a power supply input coupled to a power supply voltage terminal, a ground input coupled to a ground voltage terminal, a first input coupled to a first signal terminal, a second input coupled to a second signal terminal, and an output for providing an enable signal when a voltage on the first signal terminal is less than a voltage on the ground voltage terminal by at least a predetermined amount when a signal on said second signal terminal is in a first predetermined logic state. The logic circuit has an input for receiving the enable signal. The logic circuit changes an operation of the integrated circuit in response to an activation of the enable signal.

3. 发明申请

US20140254729A1 Detecting Digital Radio Signals 审中-公开
标题翻译：检测数字无线电信号
公开(公告)号：US20140254729A1
公开(公告)日：2014-09-11
申请号：US14283648
申请日：2014-05-21
申请人： Silicon Laboratories Inc.
发明人： Javier Elenes , Brian D. Green , Michael R. May
IPC分类号： H04B1/08 , H04L25/03
CPC分类号： H04B1/086 , H04H20/30 , H04H60/12 , H04H2201/18 , H04L25/03834 , H04L27/0008 , H04W52/0229 , Y02D70/00
摘要： In one embodiment, a receiver front end circuit can receive and process multiple radio frequency (RF) signals and output downconverted signals corresponding to these signals. In turn, multiple signal processors can be coupled to this front end. Specifically, a first signal processor can receive and process the downconverted signals to output a first signal obtained from content of a first RF signal, and a second signal processor can receive and process the downconverted signals to output a second signal obtained from content of a second RF signal. In addition, the apparatus may include a detection circuit coupled to the receiver front end circuit to detect presence of at least the second signal and enable the second signal processor responsive to the detected presence.
摘要翻译：在一个实施例中，接收器前端电路可以接收和处理多个射频（RF）信号并输出与这些信号对应的下变频信号。反过来，多个信号处理器可以耦合到该前端。具体地，第一信号处理器可以接收并处理下变频信号以输出从第一RF信号的内容获得的第一信号，并且第二信号处理器可以接收并处理下变频信号以输出从第二RF信号的内容获得的第二信号射频信号。此外，该装置可以包括耦合到接收器前端电路的检测电路，以检测至少第二信号的存在，并使第二信号处理器能够响应于检测到的存在。

4. 发明授权

US09787388B1 Fully flexible multi-tuner front end architecture for a receiver 有权
公开(公告)号：US09787388B1
公开(公告)日：2017-10-10
申请号：US15086248
申请日：2016-03-31
申请人： Silicon Laboratories Inc.
发明人： Russell Croman , Nebojsa Stanic , Michael Johnson , Dan B. Kasha , Michael R. May
IPC分类号： H04B1/18 , H04B7/08 , H04B1/00 , H04B1/16
CPC分类号： H04B7/08 , H04B1/0064 , H04B1/0075 , H04B1/16
摘要： In an example, a method includes: in a first mode, causing a first tuner of an entertainment system to receive and process a first RF signal from a first antenna configured for a first band to output a first audio signal of a first radio station and causing a second tuner of the entertainment system to receive a second RF signal from a second antenna configured for the first band to determine signal quality metrics for one or more radio stations of the first band; in a second mode, causing the first tuner to output a first signal representation of the first RF signal and causing the second tuner to receive and process the second RF signal to output a second signal representation of the second RF signal; and causing a phase diversity combining circuit to process the first and second signal representations to output an audio signal of the first radio station, without disruption of output from the entertainment system of a broadcast of the first radio station.

5. 发明授权

US09608681B1 Output driver architecture with low spur noise 有权
公开(公告)号：US09608681B1
公开(公告)日：2017-03-28
申请号：US14868473
申请日：2015-09-29
申请人： Silicon Laboratories Inc.
发明人： Michael R. May
IPC分类号： H03D1/04 , H04B1/10 , H03H11/12 , H03H11/04
CPC分类号： H04B1/1036 , H03H11/0405 , H03H11/12
摘要： In one embodiment, an integrated circuit includes: a first input pad to receive a radio frequency (RF) signal; a radio receiver to process the RF signal and output a digitally processed signal; an analog filter to receive a digital signal via an input signal path and output a drive signal via an output signal path; and a first output pad coupled to the output signal path to output a filtered digital signal based on the drive signal.

6. 发明申请

US20220115941A1 INTERFACE FOR PASSING CONTROL INFORMATION OVER AN ISOLATION CHANNEL 有权
公开(公告)号：US20220115941A1
公开(公告)日：2022-04-14
申请号：US17066251
申请日：2020-10-08
申请人： Silicon Laboratories Inc.
发明人： Michael R. May , Fernando Naim Lavalle Aviles , Carlos Jesus Briseno-Vidrios , Patrick De Bakker , Gabor Marek , Charles Guo Lin , Peter Onody , Tamás Marozsák , András V. Horváth
IPC分类号： H02M1/08 , H03K17/691 , H03K17/18
摘要： An isolated gate driver has a first portion in a first voltage domain and a second portion in a second voltage domain. The first and second portions are coupled by an isolation communication channel. The isolated gate driver transmits across the isolation communication channel a serial word containing first drive strength information and simultaneously transmits gate information with the serial word across the isolation communication channel. The gate information indicates a state of a gate signal for a transistor coupled to the second portion of the isolated gate driver. A demodulator circuit demodulates a signal containing the gate information and the drive strength information transmitted across the isolation communication channel in the serial word. A gate signal output circuit coupled to the demodulator circuit supplies the gate signal based on the gate information with a drive strength of the gate signal being based on the drive strength information.

7. 发明授权

US10128930B2 Fully flexible multi-tuner front end architecture for a receiver 有权
公开(公告)号：US10128930B2
公开(公告)日：2018-11-13
申请号：US15710967
申请日：2017-09-21
申请人： Silicon Laboratories Inc.
发明人： Russell Croman , Nebojsa Stanic , Michael Johnson , Dan B. Kasha , Michael R. May
IPC分类号： H04B1/18 , H04B7/08 , H04B1/00 , H04B1/16
摘要： In an example, a method includes: in a first mode, causing a first tuner of an entertainment system to receive and process a first RF signal from a first antenna configured for a first band to output a first audio signal of a first radio station and causing a second tuner of the entertainment system to receive a second RF signal from a second antenna configured for the first band to determine signal quality metrics for one or more radio stations of the first band; in a second mode, causing the first tuner to output a first signal representation of the first RF signal and causing the second tuner to receive and process the second RF signal to output a second signal representation of the second RF signal; and causing a phase diversity combining circuit to process the first and second signal representations to output an audio signal of the first radio station, without disruption of output from the entertainment system of a broadcast of the first radio station.

8. 发明授权

US09312899B2 Radio frequency (RF) receivers having whitened digital frame processing and related methods 有权
标题翻译：具有白化数字帧处理和相关方法的射频（RF）接收机
公开(公告)号：US09312899B2
公开(公告)日：2016-04-12
申请号：US14301764
申请日：2014-06-11
申请人： Silicon Laboratories Inc.
发明人： Michael R. May , Junsong Li
IPC分类号： H03K9/00 , H04B1/16 , H04L7/00
CPC分类号： H04B1/16 , H04B1/001 , H04L7/0079
摘要： Radio frequency (RF) receivers having whitened digital frame processing and related methods are disclosed. Disclosed embodiments whiten frequency domain interference generated periodic current pulses from by digital frame processing by applying a variable time delay to the frame control signals that initiate digital frame processing. For one embodiment, the variable time delay is achieved by waiting a variable number of digital clock cycles for each digital frame processing cycle. Still further, a variable number of no operation (NO-OP) cycles can be performed at the beginning of each frame processing cycle to provide the variable time delay for the variable number of digital clock cycles. Other variable time delay techniques could also be utilized while still taking advantage of the whitened digital frame processing embodiments described herein.
摘要翻译：公开了具有白化数字帧处理和相关方法的射频（RF）接收机。公开的实施方案白化频域干扰通过对发起数字帧处理的帧控制信号应用可变时间延迟从数字帧处理产生周期性电流脉冲。对于一个实施例，可变时间延迟通过为每个数字帧处理周期等待可变数目的数字时钟周期来实现。此外，可以在每个帧处理周期的开始执行可变数目的无操作（NO-OP）周期，以为可变数量的数字时钟周期提供可变时间延迟。还可以利用其他可变时间延迟技术，同时仍然利用本文描述的增白数字帧处理实施例。

9. 发明授权

US10976366B2 Two pin scan interface for low pin count devices 有权
公开(公告)号：US10976366B2
公开(公告)日：2021-04-13
申请号：US16165058
申请日：2018-10-19
申请人： Silicon Laboratories Inc.
发明人： Patrick J. de Bakker , Michael R. May
IPC分类号： G01R31/28 , G01R31/3177 , G01R31/317
摘要： A scan controller provides a translation between a two terminal external interface and a four signal line internal scan interface to a digital core of the integrated circuit. The two terminal external interface has an input terminal and an input/output terminal. The input terminal receives a clock signal and the input/output terminal serially receives a scan enable signal and a scan in data bit. A state machine controls the scan controller. The scan in data bit, the scan enable signal, and a scan clock signal are supplied in parallel to the internal scan interface. The digital logic provides a scan out data bit and the scan controller supplies the scan out data bit over the input/output terminal in synchronism with the clock signal.

10. 发明申请

US20180026701A1 FULLY FLEXIBLE MULTI-TUNER FRONT END ARCHITECTURE FOR A RECEIVER 审中-公开
公开(公告)号：US20180026701A1
公开(公告)日：2018-01-25
申请号：US15710967
申请日：2017-09-21
申请人： Silicon Laboratories Inc.
发明人： Russell Croman , Nebojsa Stanic , Michael Johnson , Dan B. Kasha , Michael R. May
IPC分类号： H04B7/08 , H04B1/00 , H04B1/16
CPC分类号： H04B7/08 , H04B1/0064 , H04B1/0075 , H04B1/16
摘要： In an example, a method includes: in a first mode, causing a first tuner of an entertainment system to receive and process a first RF signal from a first antenna configured for a first band to output a first audio signal of a first radio station and causing a second tuner of the entertainment system to receive a second RF signal from a second antenna configured for the first band to determine signal quality metrics for one or more radio stations of the first band; in a second mode, causing the first tuner to output a first signal representation of the first RF signal and causing the second tuner to receive and process the second RF signal to output a second signal representation of the second RF signal; and causing a phase diversity combining circuit to process the first and second signal representations to output an audio signal of the first radio station, without disruption of output from the entertainment system of a broadcast of the first radio station.

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