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1. 发明授权

US08460966B2 Thin film transistor and method for fabricating thin film transistor 有权
标题翻译：薄膜晶体管及制造薄膜晶体管的方法
公开(公告)号：US08460966B2
公开(公告)日：2013-06-11
申请号：US13181995
申请日：2011-07-13
申请人： Sung Hwan Choi , Min Koo Han
发明人： Sung Hwan Choi , Min Koo Han
IPC分类号： H01L21/44 , H01L29/24
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78606
摘要： A thin film transistor, which has a first passivation layer and a second passivation layer to maintain high reliability while preventing hydrogen from being induced to a semiconductor layer, and a method for fabricating the thin film transistor are provided. The method includes providing a substrate including an insulation substrate, forming a gate electrode on the substrate, forming a gate insulation layer on the substrate and the gate electrode, forming a semiconductor layer on the gate insulation layer, forming source/drain electrodes on the semiconductor layer to expose a portion of a top portion of the semiconductor layer, forming a first passivation layer to cover exposed top portions of the gate insulation layer, the semiconductor layer and the source/drain electrodes, and forming a second passivation layer on the first passivation layer, wherein the forming of the second passivation layer comprises performing deposition at a higher temperature than the forming of the first passivation layer.
摘要翻译：一种薄膜晶体管，其具有第一钝化层和第二钝化层，以保持高可靠性，同时防止氢被诱导到半导体层，以及制造薄膜晶体管的方法。该方法包括提供包括绝缘衬底的衬底，在衬底上形成栅电极，在衬底上形成栅极绝缘层和栅电极，在栅极绝缘层上形成半导体层，在半导体上形成源/漏电极以露出半导体层的顶部的一部分，形成第一钝化层以覆盖栅极绝缘层，半导体层和源极/漏极的暴露的顶部部分，以及在第一钝化层上形成第二钝化层层，其中所述第二钝化层的形成包括在比所述第一钝化层的形成更高的温度下进行沉积。

2. 发明授权

US08344384B2 Thin film transistor and manufacturing method thereof 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US08344384B2
公开(公告)日：2013-01-01
申请号：US13024978
申请日：2011-02-10
申请人： Sung Hwan Choi , Min Koo Han
发明人： Sung Hwan Choi , Min Koo Han
IPC分类号： H01L29/04
CPC分类号： H01L29/66477 , H01L29/45 , H01L29/66969 , H01L29/78618 , H01L29/78693
摘要： Disclosed are a thin film transistor and a method of manufacturing the thin film transistor. An electrode layer of the thin film transistor includes a seed layer formed of a transparent conductive material doped with indium gallium zinc oxide (IGZO) and a main layer formed of a transparent conductive material. The thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulation film on the substrate to cover the gate electrode, a semiconductor layer disposed on the gate insulation film in a region corresponding to the gate electrode, an electrode layer having a double layer structure and disposed on the gate insulation film in a manner such that a topside portion of the semiconductor layer is exposed through the electrode layer, and a passivation layer on the gate insulation film to cover the semiconductor layer and the electrode layer.
摘要翻译：公开了薄膜晶体管和制造薄膜晶体管的方法。薄膜晶体管的电极层包括由掺杂有铟镓锌氧化物（IGZO）的透明导电材料和由透明导电材料形成的主层形成的晶种层。所述薄膜晶体管包括基板，所述基板上的栅极电极，所述基板上的覆盖所述栅电极的栅极绝缘膜，在与所述栅电极对应的区域中的所述栅极绝缘膜上设置的半导体层，具有双层结构，并且以使得半导体层的顶侧部分通过电极层露出的方式设置在栅极绝缘膜上，以及在栅极绝缘膜上覆盖半导体层和电极层的钝化层。

3. 发明申请

US20120018721A1 THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管和制造薄膜晶体管的方法
公开(公告)号：US20120018721A1
公开(公告)日：2012-01-26
申请号：US13181995
申请日：2011-07-13
申请人： Sung Hwan Choi , Min Koo Han
发明人： Sung Hwan Choi , Min Koo Han
IPC分类号： H01L29/786 , H01L29/24 , H01L21/44 , H01L21/36 , H01L29/04
CPC分类号： H01L29/7869 , H01L29/66969 , H01L29/78606
摘要： A thin film transistor, which has a first passivation layer and a second passivation layer to maintain high reliability while preventing hydrogen from being induced to a semiconductor layer, and a method for fabricating the thin film transistor are provided. The method includes providing a substrate including an insulation substrate, forming a gate electrode on the substrate, forming a gate insulation layer on the substrate and the gate electrode, forming a semiconductor layer on the gate insulation layer, forming source/drain electrodes on the semiconductor layer to expose a portion of a top portion of the semiconductor layer, forming a first passivation layer to cover exposed top portions of the gate insulation layer, the semiconductor layer and the source/drain electrodes, and forming a second passivation layer on the first passivation layer, wherein the forming of the second passivation layer comprises performing deposition at a higher temperature than the forming of the first passivation layer.
摘要翻译：一种薄膜晶体管，其具有第一钝化层和第二钝化层，以保持高可靠性，同时防止氢被诱导到半导体层，以及制造薄膜晶体管的方法。该方法包括提供包括绝缘衬底的衬底，在衬底上形成栅电极，在衬底上形成栅极绝缘层和栅电极，在栅极绝缘层上形成半导体层，在半导体上形成源/漏电极以露出半导体层的顶部的一部分，形成第一钝化层以覆盖栅极绝缘层，半导体层和源极/漏极的暴露的顶部部分，以及在第一钝化层上形成第二钝化层层，其中所述第二钝化层的形成包括在比所述第一钝化层的形成更高的温度下进行沉积。

4. 发明申请

US20130105799A1 THIN FILM TRANSISTOR AND FLEXIBLE DISPLAY USING THE SAME 审中-公开
标题翻译：薄膜晶体管和使用它的柔性显示器
公开(公告)号：US20130105799A1
公开(公告)日：2013-05-02
申请号：US13326474
申请日：2011-12-15
申请人： Sung Hwan Choi , Min Koo Han
发明人： Sung Hwan Choi , Min Koo Han
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248
摘要： Provided are a thin film transistor having a passivation layer capable of annealing at low temperature and having stable electric characteristics, and a flexible display using the same. In one embodiment, the thin film transistor includes a passivation layer formed on an active layer, the passivation layer including a fluoropolymer.
摘要翻译：提供了具有能够在低温退火并具有稳定的电特性的钝化层的薄膜晶体管，以及使用该钝化层的柔性显示器。在一个实施例中，薄膜晶体管包括形成在有源层上的钝化层，钝化层包括含氟聚合物。

5. 发明申请

US20120187407A1 THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20120187407A1
公开(公告)日：2012-07-26
申请号：US13024978
申请日：2011-02-10
申请人： Sung Hwan Choi , Min Koo Han
发明人： Sung Hwan Choi , Min Koo Han
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/66477 , H01L29/45 , H01L29/66969 , H01L29/78618 , H01L29/78693
摘要： Disclosed are a thin film transistor and a method of manufacturing the thin film transistor. An electrode layer of the thin film transistor includes a seed layer formed of a transparent conductive material doped with indium gallium zinc oxide (IGZO) and a main layer formed of a transparent conductive material. The thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulation film on the substrate to cover the gate electrode, a semiconductor layer disposed on the gate insulation film in a region corresponding to the gate electrode, an electrode layer having a double layer structure and disposed on the gate insulation film in a manner such that a topside portion of the semiconductor layer is exposed through the electrode layer, and a passivation layer on the gate insulation film to cover the semiconductor layer and the electrode layer.
摘要翻译：公开了薄膜晶体管和制造薄膜晶体管的方法。薄膜晶体管的电极层包括由掺杂有铟镓锌氧化物（IGZO）的透明导电材料和由透明导电材料形成的主层形成的晶种层。所述薄膜晶体管包括基板，所述基板上的栅极电极，所述基板上的覆盖所述栅电极的栅极绝缘膜，在与所述栅电极对应的区域中的所述栅极绝缘膜上设置的半导体层，具有双层结构，并且以使得半导体层的顶侧部分通过电极层露出的方式设置在栅极绝缘膜上，以及在栅极绝缘膜上覆盖半导体层和电极层的钝化层。

6. 发明授权

US09460653B2 Flat panel display 有权
标题翻译：平板显示器
公开(公告)号：US09460653B2
公开(公告)日：2016-10-04
申请号：US12123895
申请日：2008-05-20
申请人： Min Koo Han , Huyn Sang Park
发明人： Min Koo Han , Huyn Sang Park
IPC分类号： G02F1/133 , G09G3/32 , G02F1/1362 , G09G3/36
CPC分类号： G09G3/3225 , G02F1/13624 , G09G3/3648 , G09G2300/0814 , G09G2320/0233
摘要： Disclosed is a flat panel display that prevents image quality degradation by preventing the current leakage to the organic light emitting diode. The flat panel display comprises: a first switching element whose control electrode is electrically coupled to a scan line, being electrically coupled between a data line and a first voltage line; a second switching element whose control electrode is electrically coupled to the scan line, being electrically coupled between the first switching element and first voltage line; a capacitive element whose first electrode is electrically coupled between the first and second switching elements; a drive transistor whose control electrode is electrically coupled to the second switching element, being electrically coupled between the first voltage line and a second voltage line; and an organic light emitting diode electrically coupled between the drive transistor and second voltage line.
摘要翻译：公开了一种通过防止电流泄漏到有机发光二极管来防止图像质量劣化的平板显示器。平板显示器包括：第一开关元件，其控制电极电耦合到扫描线，电耦合在数据线和第一电压线之间; 第二开关元件，其控制电极电耦合到扫描线，电耦合在第一开关元件和第一电压线之间; 电容元件，其第一电极电耦合在第一和第二开关元件之间; 驱动晶体管，其控制电极电耦合到所述第二开关元件，电耦合在所述第一电压线和第二电压线之间; 以及电耦合在驱动晶体管和第二电压线之间的有机发光二极管。

7. 发明申请

US20110198592A1 THIN FILM TRANSISTOR AND METHOD FOR FABRICATING THIN FILM TRANSISTOR 有权
标题翻译：薄膜晶体管和制造薄膜晶体管的方法
公开(公告)号：US20110198592A1
公开(公告)日：2011-08-18
申请号：US12794062
申请日：2010-06-04
申请人： Sun Jae Kim , Min Koo Han
发明人： Sun Jae Kim , Min Koo Han
IPC分类号： H01L29/786 , H01L21/86
CPC分类号： H01L29/78627 , H01L29/42384 , H01L29/66757 , Y10S977/70
摘要： Disclosed are a thin film transistor having high reliability and providing a simplified fabricating process, and a method of fabricating the thin film transistor. In the method, a dielectric substrate is prepared, a semiconductor layer is formed on the dielectric substrate, a gate dielectric film is formed on the semiconductor layer, a first gate electrode is formed on the gate dielectric film, a second gate electrode contacting a side wall of the first gate electrode is formed, and impurities are implanted into the semiconductor layer using the first gate electrode as a mask.
摘要翻译：公开了具有高可靠性并提供简化的制造工艺的薄膜晶体管，以及制造薄膜晶体管的方法。在该方法中，制备电介质基板，在电介质基板上形成半导体层，在半导体层上形成栅极绝缘膜，在栅极电介质膜上形成第一栅电极，形成第一栅电极的壁，并且使用第一栅电极作为掩模将杂质注入到半导体层中。

8. 发明申请

US20080291351A1 Flat Panel Display 有权
标题翻译：平板显示器
公开(公告)号：US20080291351A1
公开(公告)日：2008-11-27
申请号：US12123895
申请日：2008-05-20
申请人： Min Koo Han , Huyn Sang Park
发明人： Min Koo Han , Huyn Sang Park
IPC分类号： G02F1/133 , G09G3/32
CPC分类号： G09G3/3225 , G02F1/13624 , G09G3/3648 , G09G2300/0814 , G09G2320/0233
摘要： Disclosed is a flat panel display that can prevent image quality degradation by preventing the current transmitted to the organic light emitting diode or liquid crystal of the flat panel display from being changed by the leakage current and keeping the current stably. The flat panel display comprises: a first switching element whose control electrode is electrically coupled to a scan line, being electrically coupled between a data line and a first voltage line; a second switching element whose control electrode is electrically coupled to the scan line, being electrically coupled between the first switching element and first voltage line; a capacitive element whose first electrode is electrically coupled between the first and second switching elements; a drive transistor whose control electrode is electrically coupled to the second switching element, being electrically coupled between the first voltage line and a second voltage line; and an organic light emitting diode electrically coupled between the drive transistor and second voltage line.
摘要翻译：公开了一种平板显示器，其可以通过防止透射到平板显示器的有机发光二极管或液晶的电流由漏电流改变并且稳定地保持电流来防止图像质量劣化。平板显示器包括：第一开关元件，其控制电极电耦合到扫描线，电耦合在数据线和第一电压线之间; 第二开关元件，其控制电极电耦合到扫描线，电耦合在第一开关元件和第一电压线之间; 电容元件，其第一电极电耦合在第一和第二开关元件之间; 驱动晶体管，其控制电极电耦合到所述第二开关元件，电耦合在所述第一电压线和第二电压线之间; 以及电耦合在驱动晶体管和第二电压线之间的有机发光二极管。

9. 发明申请

US20130089972A1 METHOD FOR FORMING NANOCRYSTALLINE SILICON FILM 审中-公开
标题翻译：形成纳米晶硅膜的方法
公开(公告)号：US20130089972A1
公开(公告)日：2013-04-11
申请号：US13253616
申请日：2011-10-05
申请人： Min Koo Han , Sun Jae Kim
发明人： Min Koo Han , Sun Jae Kim
IPC分类号： H01L21/20
CPC分类号： C23C16/24 , C23C16/0245 , C30B25/105 , C30B29/06 , C30B29/605 , H01L21/02381 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/02658
摘要： Provided is a method for forming a nanocrystalline silicon film that can be deposited on a substrate while maintaining a high degree of crystallinity at low temperatures. The method includes performing plasma treatment on a substrate, and forming a nanocrystalline silicon film by depositing the nanocrystalline silicon film on the substrate.
摘要翻译：本发明提供一种能够在低温下保持高结晶度的同时沉积在基板上的纳米晶硅膜的形成方法。该方法包括对衬底进行等离子体处理，并通过在衬底上沉积纳米晶硅膜形成纳米晶硅膜。

10. 发明申请

US20130075731A1 MANUFACTURING METHOD FOR THIN FILM TRANSISTOR AND THIN FILM TRANSISTOR MANUFACTURED BY THEM 审中-公开
标题翻译：薄膜晶体管及其制造的薄膜晶体管的制造方法
公开(公告)号：US20130075731A1
公开(公告)日：2013-03-28
申请号：US13311698
申请日：2011-12-06
申请人： Min Koo Han , Sun Jae Kim
发明人： Min Koo Han , Sun Jae Kim
IPC分类号： H01L21/336 , H01L29/786 , H01L29/04
CPC分类号： H01L29/66765 , H01L29/66969 , H01L29/7869
摘要： Provided are a manufacturing method for a thin film transistor, and a thin film transistor manufactured by the manufacturing method. In the manufacturing method, a semiconductor layer and an insulating layer for stopping etching, which are sequentially stacked, are etched by dry etching and wet etching using a single photoresist pattern, and patterning the semiconductor layer and the insulating layer into a channel layer and an etch stop layer, respectively, thereby simplifying the manufacturing process of the thin film transistor.
摘要翻译：提供了一种薄膜晶体管的制造方法和通过该制造方法制造的薄膜晶体管。在制造方法中，通过使用单一光致抗蚀剂图案的干蚀刻和湿蚀刻来蚀刻依次层叠的半导体层和用于停止蚀刻的绝缘层，并将半导体层和绝缘层图案化为沟道层和蚀刻停止层，从而简化了薄膜晶体管的制造工艺。

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