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1. 发明授权

US09412599B2 Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US09412599B2
公开(公告)日：2016-08-09
申请号：US14572490
申请日：2014-12-16
申请人： Synaptics Display Devices GK
发明人： Hiroshi Ishida , Kazuhiko Sato
IPC分类号： H01L27/115 , H01L29/51 , H01L21/28 , H01L29/66 , H01L21/8234 , H01L29/792 , H01L21/265 , H01L29/49
CPC分类号： H01L21/28282 , H01L21/26586 , H01L21/823462 , H01L27/11573 , H01L29/4916 , H01L29/66537 , H01L29/792
摘要： A gate oxide film is formed in a region having a MOSFET on a semiconductor substrate formed therein, and a first polysilicon film serving as a gate electrode of the MOSFET is further formed. Thereafter, a charge storage three-layer film is formed by opening a region having a MONOS type FET formed therein, exposing a semiconductor surface of the semiconductor substrate, and sequentially depositing a first potential barrier film, a charge storage film, and a second potential barrier film. In this case, before the charge storage three-layer film is formed, an anti-oxidation film is formed on the first polysilicon film.
摘要翻译：在其上形成有半导体衬底的MOSFET的区域中形成栅极氧化膜，并且进一步形成用作MOSFET的栅电极的第一多晶硅膜。此后，通过打开其中形成的具有MONOS型FET的区域，暴露半导体衬底的半导体表面，并依次沉积第一势垒膜，电荷存储膜和第二电位来形成电荷存储三层膜屏障胶片在这种情况下，在形成电荷存储三层膜之前，在第一多晶硅膜上形成抗氧化膜。

2. 发明授权

US09412755B2 Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US09412755B2
公开(公告)日：2016-08-09
申请号：US14572115
申请日：2014-12-16
申请人： Synaptics Display Devices GK
发明人： Hiroshi Ishida , Kazuhiko Sato
IPC分类号： H01L21/8234 , H01L27/115 , H01L21/28 , H01L29/66 , H01L29/792 , H01L29/49 , H01L21/265
CPC分类号： H01L27/11573 , H01L21/26586 , H01L21/28282 , H01L21/823462 , H01L29/4916 , H01L29/66537 , H01L29/792
摘要： In a manufacturing method for a semiconductor device provided with a MONOS-type FET for a non-volatile memory and high-voltage and low-voltage MOSFETs, a groove having a predetermined depth is formed in a region in which the high-voltage MOSFET on a semiconductor substrate is formed, and an oxide film serving as a gate insulating film of the high-voltage MOSFET is formed within the formed groove by thermal oxidation. Thereafter, a gate electrode film of the low-voltage MOSFET is formed on the entire surface of the semiconductor substrate. Thereafter, a region for the MONOS-type FET is opened, the semiconductor surface of the semiconductor substrate is exposed, and a first potential barrier film, a charge storage film, and a second potential barrier film are sequentially deposited, to thereby form a charge storage three-layer film. Agate electrode film of the MONOS-type FET is formed on the formed charge storage three-layer film.
摘要翻译：在具有用于非易失性存储器的MONOS型FET和高压和低压MOSFET的半导体器件的制造方法中，在高压MOSFET的区域中形成具有预定深度的沟槽形成半导体衬底，并且通过热氧化在形成的沟槽内形成用作高压MOSFET的栅极绝缘膜的氧化膜。此后，在半导体衬底的整个表面上形成低压MOSFET的栅极电极膜。此后，打开用于MONOS型FET的区域，半导体衬底的半导体表面被暴露，并且顺序地沉积第一势垒膜，电荷存储膜和第二势垒膜，从而形成电荷储存三层薄膜。在形成的电荷存储三层膜上形成MONOS型FET的玛瑙电极膜。

3. 发明授权

US09214354B2 Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US09214354B2
公开(公告)日：2015-12-15
申请号：US14572512
申请日：2014-12-16
申请人： Synaptics Display Devices GK
发明人： Hiroshi Ishida , Kazuhiko Sato
IPC分类号： H01L21/8242 , H01L21/306 , H01L27/115 , H01L21/762 , H01L21/28 , H01L29/66 , H01L21/8234 , H01L29/49 , H01L21/265
CPC分类号： H01L21/30625 , H01L21/26586 , H01L21/28282 , H01L21/76224 , H01L21/823462 , H01L27/11573 , H01L29/4916 , H01L29/66537 , H01L29/792
摘要： In a manufacturing method of sequentially forming a gate electrode film of the MOSFET, forming a gate electrode film of the non-volatile memory FET, patterning the gate electrode of the non-volatile memory FET, and patterning the gate electrode of the MOSFET, in order to form the MOSFET and the non-volatile memory FET on the same semiconductor substrate. The value of the product of S/L and H/L is specified in a case that the line of the gate electrode of the non-volatile memory FET is set to L, the space thereof is set to S, and the height thereof is set to H so that the thickness of a resist film on the gate electrode of the non-volatile memory FET which is formed in advance is set to a thickness which is not lost by etching for forming the gate electrode of the MOSFET.
摘要翻译：在顺序地形成MOSFET的栅电极膜的制造方法中，形成非易失性存储FET的栅电极膜，对非易失性存储FET的栅电极进行构图，并对MOSFET的栅极电极进行图案化，以便在相同的半导体衬底上形成MOSFET和非易失性存储器FET。在非易失性存储器FET的栅电极的线设定为L，其空间设定为S，其高度为S的情况下，规定S / L和H / L的乘积值设定为H，使得预先形成的非易失性存储FET的栅电极上的抗蚀剂膜的厚度被设定为不会通过用于形成MOSFET的栅电极的蚀刻而损失的厚度。

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