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    • 2. 发明授权
    • Updating pin locations in a graphical user interface of an electronic design automation tool
    • 在电子设计自动化工具的图形用户界面中更新针位置
    • US09064082B2
    • 2015-06-23
    • US14509765
    • 2014-10-08
    • Synopsys, Inc.
    • Zhengtao Yu
    • G06F17/50
    • G06F17/5072G06F17/5045G06F17/5054G06F17/5068G06F17/5077G06F17/5081G06F2217/06G06F2217/74
    • Methods and apparatuses are described for creating, editing, and viewing a floorplan of a circuit design. Specifically, some embodiments enable a user to perform a graphical operation at an inference point in a circuit design layout, wherein the location of the inference point is determined based on existing graphical objects in the circuit design layout. Some embodiments substantially instantaneously update a congestion indicator in a circuit design layout in response to modifying the circuit design layout. Some embodiments substantially instantaneously update pin locations of a block or partition in response to changing the size or shape of the block or partition. Some embodiments enable a user to view a circuit design layout based on the logical hierarchy, and also based on at least one additional attribute type such as voltage, power, or clock domain.
    • 描述了用于创建,编辑和查看电路设计的平面图的方法和装置。 具体地,一些实施例使得用户能够在电路设计布局中的推理点处执行图形操作,其中基于电路设计布局中的现有图形对象确定推理点的位置。 响应于修改电路设计布局,一些实施例实质上瞬时地更新电路设计布局中的拥塞指示符。 响应于改变块或分区的大小或形状,一些实施例实质上瞬时更新块或分区的引脚位置。 一些实施例使得用户能够基于逻辑层次来查看电路设计布局,并且还基于诸如电压,功率或时钟域的至少一个额外的属性类型。
    • 3. 发明申请
    • MULTIPLE-INSTANTIATED-MODULE (MIM) AWARE PIN ASSIGNMENT
    • 多功能模块(MIM)注意引脚分配
    • US20140189632A1
    • 2014-07-03
    • US13753103
    • 2013-01-29
    • SYNOPSYS, INC.
    • Zhengtao Yu
    • G06F17/50
    • G06F17/5077G06F2217/08
    • Systems and techniques for multiple-instantiated-module (MIM)-aware pin assignment are described. An aggregate cost function can be determined, wherein the aggregate cost function is aggregated across all instances of an MIM for placing a pin at a particular location on the boundary of the MIM. The aggregate cost function can then be used by a pin assignment engine to place the pin in the MIM. A pin assignment engine can place one pin at a time, or place multiple pins at a time by trying to optimize the aggregate cost over multiple pins. Some embodiments can propagate pin-alignment constraints through one or more instances of one or more MIMs in the circuit design layout, and then perform pin assignment while observing the pin-alignment constraints. In some embodiments, pin assignment can be performed on MIMs in decreasing order of the number of pin-alignment constraints that are imposed on the MIMs.
    • 描述了用于多实例化模块(MIM) - 引脚分配的系统和技术。 可以确定总成本函数,其中聚合成本函数在MIM的所有实例上聚合以将引脚放置在MIM的边界上的特定位置。 然后可以通过引脚分配引擎将总成本函数用于将引脚放入MIM中。 引脚分配引擎可以一次放置一个引脚,或者通过尝试优化多个引脚的总成本,一次放置多个引脚。 一些实施例可以通过电路设计布局中的一个或多个MIM的一个或多个实例来传播引脚对准约束,然后在遵守引脚对准约束的同时执行引脚分配。 在一些实施例中,可以按照施加在MIM上的引脚对准约束的数量的递减顺序对MIM执行引脚分配。
    • 6. 发明授权
    • Multiple-instantiated-module (mim) aware pin assignment
    • 多实例模块(mim)感知引脚分配
    • US09147030B2
    • 2015-09-29
    • US14326002
    • 2014-07-08
    • Synopsys, Inc.
    • Zhengtao Yu
    • G06F17/50
    • G06F17/5077G06F2217/08
    • Systems and techniques for multiple-instantiated-module (MIM)-aware pin assignment are described. An aggregate cost function can be determined, wherein the aggregate cost function is aggregated across all instances of an MIM for placing a pin at a particular location on the boundary of the MIM. The aggregate cost function can then be used by a pin assignment engine to place the pin in the MIM. A pin assignment engine can place one pin at a time, or place multiple pins at a time by trying to optimize the aggregate cost over multiple pins. Some embodiments can propagate pin-alignment constraints through one or more instances of one or more MIMs in the circuit design layout, and then perform pin assignment while observing the pin-alignment constraints. In some embodiments, pin assignment can be performed on MIMs in decreasing order of the number of pin-alignment constraints that are imposed on the MIMs.
    • 描述了用于多实例化模块(MIM) - 引脚分配的系统和技术。 可以确定总成本函数,其中聚合成本函数在MIM的所有实例上聚合以将引脚放置在MIM的边界上的特定位置。 然后可以通过引脚分配引擎将总成本函数用于将引脚放入MIM中。 引脚分配引擎可以一次放置一个引脚,或者通过尝试优化多个引脚的总成本,一次放置多个引脚。 一些实施例可以通过电路设计布局中的一个或多个MIM的一个或多个实例来传播引脚对准约束,然后在遵守引脚对准约束的同时执行引脚分配。 在一些实施例中,可以按照施加在MIM上的引脚对准约束的数量的递减顺序对MIM执行引脚分配。
    • 7. 发明申请
    • UPDATING PIN LOCATIONS IN A GRAPHICAL USER INTERFACE OF AN ELECTRONIC DESIGN AUTOMATION TOOL
    • 在电子设计自动化工具的图形用户界面中更新针位置
    • US20150026656A1
    • 2015-01-22
    • US14509765
    • 2014-10-08
    • Synopsys, Inc.
    • Zhengtao Yu
    • G06F17/50
    • G06F17/5072G06F17/5045G06F17/5054G06F17/5068G06F17/5077G06F17/5081G06F2217/06G06F2217/74
    • Methods and apparatuses are described for creating, editing, and viewing a floorplan of a circuit design. Specifically, some embodiments enable a user to perform a graphical operation at an inference point in a circuit design layout, wherein the location of the inference point is determined based on existing graphical objects in the circuit design layout. Some embodiments substantially instantaneously update a congestion indicator in a circuit design layout in response to modifying the circuit design layout. Some embodiments substantially instantaneously update pin locations of a block or partition in response to changing the size or shape of the block or partition. Some embodiments enable a user to view a circuit design layout based on the logical hierarchy, and also based on at least one additional attribute type such as voltage, power, or clock domain.
    • 描述了用于创建,编辑和查看电路设计的平面图的方法和装置。 具体地,一些实施例使得用户能够在电路设计布局中的推理点处执行图形操作,其中基于电路设计布局中的现有图形对象确定推理点的位置。 响应于修改电路设计布局,一些实施例实质上瞬时地更新电路设计布局中的拥塞指示符。 响应于改变块或分区的大小或形状,一些实施例实质上瞬时更新块或分区的引脚位置。 一些实施例使得用户能够基于逻辑层次来查看电路设计布局,并且还基于诸如电压,功率或时钟域的至少一个额外的属性类型。
    • 8. 发明授权
    • Multiple-instantiated-module (MIM) aware pin assignment
    • 多实例模块(MIM)感知引脚分配
    • US08806407B2
    • 2014-08-12
    • US13753103
    • 2013-01-29
    • Synopsys, Inc.
    • Zhengtao Yu
    • G06F17/50
    • G06F17/5077G06F2217/08
    • Systems and techniques for multiple-instantiated-module (MIM)-aware pin assignment are described. An aggregate cost function can be determined, wherein the aggregate cost function is aggregated across all instances of an MIM for placing a pin at a particular location on the boundary of the MIM. The aggregate cost function can then be used by a pin assignment engine to place the pin in the MIM. A pin assignment engine can place one pin at a time, or place multiple pins at a time by trying to optimize the aggregate cost over multiple pins. Some embodiments can propagate pin-alignment constraints through one or more instances of one or more MIMs in the circuit design layout, and then perform pin assignment while observing the pin-alignment constraints. In some embodiments, pin assignment can be performed on MIMs in decreasing order of the number of pin-alignment constraints that are imposed on the MIMs.
    • 描述了用于多实例化模块(MIM) - 引脚分配的系统和技术。 可以确定总成本函数,其中聚合成本函数在MIM的所有实例上聚合以将引脚放置在MIM的边界上的特定位置。 然后可以通过引脚分配引擎将总成本函数用于将引脚放入MIM中。 引脚分配引擎可以一次放置一个引脚,或者通过尝试优化多个引脚的总成本,一次放置多个引脚。 一些实施例可以通过电路设计布局中的一个或多个MIM的一个或多个实例来传播引脚对准约束,然后在遵守引脚对准约束的同时执行引脚分配。 在一些实施例中,可以按照施加在MIM上的引脚对准约束的数量的递减顺序对MIM执行引脚分配。