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1. 发明授权

US10991627B2 Methods for forming fin field-effect transistors 有权
公开(公告)号：US10991627B2
公开(公告)日：2021-04-27
申请号：US16588482
申请日：2019-09-30
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Ryan Chia-Jen Chen , Yih-Ann Lin , Chia Tai Lin , Chao-Cheng Chen
IPC分类号： H01L29/66 , H01L21/8234 , H01L21/762 , H01L27/088 , H01L21/308 , H01L29/06
摘要： A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

2. 发明申请

US20200135472A1 Cut Metal Gate Processes 审中-公开
公开(公告)号：US20200135472A1
公开(公告)日：2020-04-30
申请号：US16182772
申请日：2018-11-07
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shu-Uei Jang , Ya-Yi Tsai , Ryan Chia-Jen Chen , An Chyi Wei , Shu-Yuan Ku
IPC分类号： H01L21/28 , H01L21/8234 , H01L21/3213 , H01L21/02 , H01L29/66
摘要： A method of forming a semiconductor device includes etching a gate stack to form a trench extending into the gate stack, forming a dielectric layer on a sidewall of the gate stack, with the sidewall exposed to the trench, and etching the dielectric layer to remove a first portion of the dielectric layer at a bottom of the trench. A second portion of the dielectric layer on the sidewall of the gate stack remains after the dielectric layer is etched. After the first portion of the dielectric layer is removed, the second portion of the dielectric layer is removed to reveal the sidewall of the gate stack. The trench is filled with a dielectric region, which contacts the sidewall of the gate stack.

3. 发明授权

US10134604B1 Semiconductor device and method 有权
公开(公告)号：US10134604B1
公开(公告)日：2018-11-20
申请号：US15725625
申请日：2017-10-05
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Ming-Jie Huang , Syun-Ming Jang , Ryan Chia-Jen Chen , Ming-Ching Chang , Shu-Yuan Ku , Tai-Chun Huang , Chunyao Wang , Tze-Liang Lee , Chi On Chui
IPC分类号： H01L21/3205 , H01L29/66 , H01L29/49 , H01L21/28 , H01L29/78 , H01L29/10
摘要： A method includes forming a metal gate structure over a first fin, where the metal gate structure is surrounded by a first dielectric material, and forming a capping layer over the first dielectric material, where an etch selectivity between the metal gate structure and the capping layer is over a pre-determined threshold. The method also includes forming a patterned hard mask layer over the first fin and the first dielectric material, where an opening of the patterned hard mask layer exposes a portion of the metal gate structure and a portion of the capping layer. The method further includes removing the portion of the metal gate structure exposed by the opening of the patterned hard mask layer.

4. 发明授权

US09825173B2 FinFET device 有权
公开(公告)号：US09825173B2
公开(公告)日：2017-11-21
申请号：US14882144
申请日：2015-10-13
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chia Tai Lin , Yih-Ann Lin , An-Shen Chang , Ryan Chia-Jen Chen , Chao-Cheng Chen
IPC分类号： H01L29/76 , H01L29/78 , H01L29/66 , H01L29/40 , H01L21/8234 , H01L21/84
CPC分类号： H01L29/785 , H01L21/823431 , H01L21/845 , H01L29/401 , H01L29/66795
摘要： A fin-type field-effect transistor (FinFET) device includes a plurality of fins formed over a substrate. The semiconductor device further includes a dielectric layer filled in a space between each fin and over a first portion of the plurality of fins and a dielectric trench formed in the dielectric layer. The dielectric trench has a vertical profile. The semiconductor device further includes a second portion of the plurality of fins recessed and exposed in the dielectric trench. The second portion of the plurality of fins have a rounded-convex-shape top profile.

5. 发明授权

US09698055B2 Semiconductor fin structures and methods for forming the same 有权
公开(公告)号：US09698055B2
公开(公告)日：2017-07-04
申请号：US14876398
申请日：2015-10-06
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chia-Wei Chang , Ryan Chia-Jen Chen , Srisuda Thitinun
IPC分类号： H01L21/336 , H01L21/8234 , H01L29/78 , H01L29/66 , H01L21/308 , H01L21/02 , H01L21/306 , H01L21/3105 , H01L21/311 , H01L21/762
CPC分类号： H01L21/823431 , H01L21/0206 , H01L21/30604 , H01L21/3083 , H01L21/31051 , H01L21/31111 , H01L21/76224 , H01L29/6653 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/7851 , H01L29/7853 , H01L29/7854
摘要： A method includes etching a semiconductor substrate to form a semiconductor strip and trenches on opposite sidewalls of the semiconductor strip. A spacer is formed on a sidewall of the semiconductor strip which is used as an etching mask to extend the trenches down into the semiconductor substrate. A dielectric material is filled into the trenches and then planarized to form insulation regions in the trenches. The insulation regions are recessed. After the recessing, top surfaces of the insulation regions are lower than a top surface of the semiconductor strip and a gate structure may be formed thereon.

6. 发明授权

US09159832B2 Semiconductor fin structures and methods for forming the same 有权
标题翻译：半导体翅片结构及其形成方法
公开(公告)号：US09159832B2
公开(公告)日：2015-10-13
申请号：US13789831
申请日：2013-03-08
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chia-Wei Chang , Srisuda Thitinun , Ryan Chia-Jen Chen
IPC分类号： H01L29/76 , H01L29/78 , H01L29/66 , H01L21/8234 , H01L21/308
CPC分类号： H01L21/823431 , H01L21/0206 , H01L21/30604 , H01L21/3083 , H01L21/31051 , H01L21/31111 , H01L21/76224 , H01L29/6653 , H01L29/66795 , H01L29/66818 , H01L29/785 , H01L29/7851 , H01L29/7853 , H01L29/7854
摘要： An integrated circuit structure includes a semiconductor substrate, an insulation region extending into the semiconductor substrate, and a semiconductor strip between two opposite portions of the insulation region. The semiconductor strip includes an upper portion higher than top surfaces of the insulation regions and a lower portion in the insulation region. The lower portion has a sidewall including a first sidewall portion having a first slope and a second sidewall portion over and connected to the first sidewall portion. The second sidewall portion has a second slope smaller than the first slope.
摘要翻译：集成电路结构包括半导体衬底，延伸到半导体衬底中的绝缘区域和绝缘区域的两个相对部分之间的半导体衬底。半导体条包括高于绝缘区的顶表面的上部和绝缘区中的下部。下部具有侧壁，该侧壁包括具有第一斜面的第一侧壁部分和在第一侧壁部分上并连接到第一侧壁部分的第二侧壁部分。第二侧壁部分具有小于第一斜面的第二斜面。

7. 发明授权

US09034706B2 FinFETs with regrown source/drain and methods for forming the same 有权
标题翻译：具有再生长源/漏极的FinFET，以及形成其的方法
公开(公告)号：US09034706B2
公开(公告)日：2015-05-19
申请号：US13866925
申请日：2013-04-19
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Eric Chih-Fang Liu , Tzu-Wei Kao , Ryan Chia-Jen Chen , Chao-Cheng Chen
IPC分类号： H01L21/336 , H01L29/78 , H01L29/66
CPC分类号： H01L29/66795 , H01L29/7848
摘要： A method includes etching a semiconductor substrate to form a recess in the semiconductor substrate, and reacting a surface layer of the semiconductor substrate to generate a reacted layer. The surface layer of the semiconductor substrate is in the recess. The reacted layer is then removed. An epitaxy is performed to grow a semiconductor material in the recess.
摘要翻译：一种方法包括蚀刻半导体衬底以在半导体衬底中形成凹部，并使半导体衬底的表面层反应以产生反应层。半导体衬底的表面层位于凹槽中。然后除去反应层。执行外延以在凹部中生长半导体材料。

8. 发明授权

US08946014B2 FinFET device structure and methods of making same 有权
标题翻译： FinFET器件结构及其制作方法
公开(公告)号：US08946014B2
公开(公告)日：2015-02-03
申请号：US13748312
申请日：2013-01-23
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Chao Lin , Yih-Ann Lin , Ryan Chia-Jen Chen , Chao-Cheng Chen
IPC分类号： H01L21/8234 , H01L27/088
CPC分类号： H01L29/66795 , H01L21/3086 , H01L21/3088 , H01L21/823431 , H01L27/0886
摘要： Embodiments of the present disclosure are a method of forming a semiconductor device, a method of forming a FinFET device, a FinFET device. An embodiment a method for semiconductor device, the method comprising forming a first dielectric layer over a substrate, forming a first hardmask layer over the first dielectric layer, and patterning the first hardmask layer to form a first hardmask portion with a first width. The method further comprises forming a first raised portion of the first dielectric layer with the first width, wherein the first raised portion is aligned with the first hardmask portion, and forming a first spacer and a second spacer over the first dielectric layer, wherein the first spacer and the second spacer are on opposite sides of the first raised portion, and wherein the sidewalls of the first spacer and the second spacer are substantially orthogonal to the top surface of the substrate.
摘要翻译：本公开的实施例是形成半导体器件的方法，形成FinFET器件的方法，FinFET器件。一种实施方式的半导体器件的方法，所述方法包括在衬底上形成第一介电层，在所述第一介电层上形成第一硬掩模层，以及对所述第一硬掩模层进行构图以形成具有第一宽度的第一硬掩模部分。该方法还包括以第一宽度形成第一电介质层的第一凸起部分，其中第一凸起部分与第一硬掩模部分对准，并且在第一介电层上形成第一间隔物和第二间隔物，其中第一间隔件和第二间隔件位于第一凸起部分的相对侧上，并且其中第一间隔件和第二间隔件的侧壁基本上垂直于基板的顶表面。

9. 发明申请

US20140273380A1 FinFETs with Regrown Source/Drain and Methods for Forming the Same 有权
标题翻译：具有再生源/漏极的FinFET及其形成方法
公开(公告)号：US20140273380A1
公开(公告)日：2014-09-18
申请号：US13866925
申请日：2013-04-19
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Eric Chih-Fang Liu , Tzu-Wei Kao , Ryan Chia-Jen Chen , Chao-Cheng Chen
IPC分类号： H01L29/66
CPC分类号： H01L29/66795 , H01L29/7848
摘要： A method includes etching a semiconductor substrate to form a recess in the semiconductor substrate, and reacting a surface layer of the semiconductor substrate to generate a reacted layer. The surface layer of the semiconductor substrate is in the recess. The reacted layer is then removed. An epitaxy is performed to grow a semiconductor material in the recess.
摘要翻译：一种方法包括蚀刻半导体衬底以在半导体衬底中形成凹部，并使半导体衬底的表面层反应以产生反应层。半导体衬底的表面层位于凹槽中。然后除去反应层。执行外延以在凹部中生长半导体材料。

10. 发明申请

US20140001566A1 Method Of Forming A Single Metal That Performs N Work Function And P Work Function In A High-K/Metal Gate Process 有权
标题翻译：在高K /金属栅极工艺中形成执行N工作功能和P工作功能的单一金属的方法
公开(公告)号：US20140001566A1
公开(公告)日：2014-01-02
申请号：US14013960
申请日：2013-08-29
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yih-Ann Lin , Ryan Chia-Jen Chen , Yuan-Shun Chao , Yi-Shien Mor , Kuo-Tai Huang
IPC分类号： H01L27/092
CPC分类号： H01L27/092 , H01L21/28088 , H01L21/28194 , H01L21/823842 , H01L29/4966 , H01L29/517
摘要： The present disclosure describes a semiconductor device. The device includes a semiconductor substrate, an isolation structure formed in the substrate for isolating a first active region and a second active region, a first transistor formed in the first active region, the first transistor having a high-k gate dielectric layer and a metal gate with a first work function formed over the high-k gate dielectric layer, and a second transistor formed in the second active region, the second transistor having the high-k gate dielectric layer and a metal gate with a second work function formed over the high-k gate dielectric layer. The metal gates are formed from at least a single metal layer having the first work function and the second work function.
摘要翻译：本公开描述了半导体器件。该器件包括半导体衬底，形成在用于隔离第一有源区和第二有源区的衬底中的隔离结构，形成在第一有源区中的第一晶体管，第一晶体管具有高k栅介质层和金属具有形成在高k栅极电介质层上的第一功函数的栅极和形成在第二有源区中的第二晶体管，具有高k栅极电介质层的第二晶体管和具有第二功函数的第二功函数形成在第高k栅介质层。金属栅极由具有第一功函数和第二功函数的至少一个金属层形成。

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