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1. 发明授权

US09471738B2 Method and apparatus for capacitance extraction 有权
标题翻译：电容提取方法和装置
公开(公告)号：US09471738B2
公开(公告)日：2016-10-18
申请号：US14615084
申请日：2015-02-05
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Chih-Cheng Chou , Tsung-Han Wu , Ke-ying Su , Hsien-Hsin Sean Lee , Chung-Hsing Wang
IPC分类号： G06F9/455 , G06F17/50
CPC分类号： G06F17/5081
摘要： A method comprises processing a layout of an integrated circuit to determine one or more attributes of one or more components of the integrated circuit. The method also comprises extracting one or more process parameters from a process file associated with manufacturing the integrated circuit. The one or more process parameters are extracted from the process file based on a computation of one or more logic functions included in the process file. The computation is based on the one or more attributes. The method further comprises calculating a capacitance value between at least two components of the integrated circuit based on the one or more process parameters and a capacitance determination rule included in the process file. At least one of the one or more process parameters, the one or more logic functions, or the capacitance determination rule is editable based on a user input.
摘要翻译：一种方法包括处理集成电路的布局以确定集成电路的一个或多个组件的一个或多个属性。该方法还包括从与制造集成电路相关联的处理文件中提取一个或多个处理参数。基于包括在处理文件中的一个或多个逻辑功能的计算，从处理文件中提取一个或多个处理参数。计算基于一个或多个属性。该方法还包括基于一个或多个处理参数和包括在处理文件中的电容确定规则来计算集成电路的至少两个分量之间的电容值。一个或多个处理参数，一个或多个逻辑功能或电容确定规则中的至少一个可以基于用户输入进行编辑。

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