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1. 发明授权

US10269864B2 Pixel isolation device and fabrication method 有权
公开(公告)号：US10269864B2
公开(公告)日：2019-04-23
申请号：US15888907
申请日：2018-02-05
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Tung-I Lin , Wei-Li Chen , Yeur-Luen Tu
IPC分类号： H01L27/146
摘要： Backside illuminated (BSI) image sensor devices are described as having pixel isolation structures formed on a sacrificial substrate. A photolayer is epitaxially grown over the pixel isolation structures. Radiation-detecting regions are formed in the photolayer adjacent to the pixel isolation structures. The pixel isolation structures include a dielectric material. The radiation-detecting regions include photodiodes. A backside surface of the BSI image sensor device is produced by planarized removal of the sacrificial substrate to physically expose the pixel isolation structures or at least optically expose the photolayer.

2. 发明申请

US20170170231A1 Pixel Isolation Device and Fabrication Method 有权
公开(公告)号：US20170170231A1
公开(公告)日：2017-06-15
申请号：US14967046
申请日：2015-12-11
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Tung-I Lin , Wei-Li Chen , Yeur-Luen Tu
IPC分类号： H01L27/146
CPC分类号： H01L27/14689
摘要： Backside illuminated (BSI) image sensor devices are described as having pixel isolation structures formed on a sacrificial substrate. A photolayer is epitaxially grown over the pixel isolation structures. Radiation-detecting regions are formed in the photolayer adjacent to the pixel isolation structures. The pixel isolation structures include a dielectric material. The radiation-detecting regions include photodiodes. A backside surface of the BSI image sensor device is produced by planarized removal of the sacrificial substrate to physically expose the pixel isolation structures or at least optically expose the photolayer.

3. 发明申请

US20150108430A1 TRANSISTOR CHANNEL 有权
标题翻译：晶体管通道
公开(公告)号：US20150108430A1
公开(公告)日：2015-04-23
申请号：US14581970
申请日：2015-01-06
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Ching-Wei Tsai , Yeur-Luen Tu , Tung-I Lin , Wei-Li Chen
IPC分类号： H01L29/165 , H01L29/267 , H01L21/8238 , H01L27/092
CPC分类号： H01L21/823821 , H01L27/0924 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A transistor device includes a substrate having a first region and a second region, a first semiconductor layer of a first semiconductor material having a first portion over the first region and a second portion over the second region, the first portion being separated from the second portion, a second semiconductor layer of a second semiconductor material over the second portion of the first semiconductor layer, a first transistor of a first conductivity type, the first transistor disposed within the first region and having a first set of source/drain regions formed in the first semiconductor layer, and a second transistor of a second conductivity type, the second transistor disposed within the second region and having a second set of source/drain regions formed in the second semiconductor layer. The second conductivity type is different than the second conductivity type, and the second semiconductor material is different from the first semiconductor material.
摘要翻译：晶体管器件包括具有第一区域和第二区域的衬底，第一半导体材料的第一半导体层，其具有在第一区域上的第一部分和在第二区域上的第二部分，第一部分与第二部分分离，在所述第一半导体层的第二部分上的第二半导体材料的第二半导体层，第一导电类型的第一晶体管，所述第一晶体管设置在所述第一区域内，并且具有形成在所述第一半导体层中的第一组源/漏区第一半导体层和第二导电类型的第二晶体管，所述第二晶体管设置在所述第二区域内，并且具有形成在所述第二半导体层中的第二组源极/漏极区。第二导电类型不同于第二导电类型，第二半导体材料与第一半导体材料不同。

4. 发明申请

US20210305131A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20210305131A1
公开(公告)日：2021-09-30
申请号：US17346186
申请日：2021-06-11
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
发明人： Yu-Hung Cheng , Shih-Pei Chou , Yeur-Luen Tu , Alexander Kalnitsky , Tung-I Lin , Wei-Li Chen
IPC分类号： H01L23/48 , H01L27/12 , H01L21/306 , H01L21/20 , H01L21/762 , H01L21/683 , H01L21/768
摘要： The present disclosure provides a semiconductor structure, including: a semiconductor device layer including a first surface and a second surface, wherein the first surface is at a front side of the semiconductor device layer, and the second surface is at a backside of the semiconductor device layer; an insulating layer above the second surface of the semiconductor device; and a through-silicon via (TSV) traversing the insulating layer. Associated manufacturing methods of the same are also provided.

5. 发明授权

US10971406B2 Method of forming source/drain regions of transistors 有权
公开(公告)号：US10971406B2
公开(公告)日：2021-04-06
申请号：US16658597
申请日：2019-10-21
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Ching-Wei Tsai , Yeur-Luen Tu , Tung-I Lin , Wei-Li Chen
IPC分类号： H01L29/267 , H01L21/8238 , H01L27/092 , H01L29/78 , H01L29/66
摘要： A method for fabricating a semiconductor device includes providing a first wafer comprising a substrate and a first semiconductor material layer, bonding the first wafer to a second wafer, the second wafer comprising a sacrificial layer and a second semiconductor material layer, removing the sacrificial layer, patterning the bonded wafers to create a first structure and a second structure, removing the second semiconductor material from the first structure, forming a first type of transistor in the first semiconductor material of the first structure, and forming a second type of transistor in the second semiconductor material of the second structure.

6. 发明授权

US09978650B2 Transistor channel 有权
公开(公告)号：US09978650B2
公开(公告)日：2018-05-22
申请号：US14581970
申请日：2015-01-06
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Ching-Wei Tsai , Yeur-Luen Tu , Tung-I Lin , Wei-Li Chen
IPC分类号： H01L29/267 , H01L21/8238 , H01L27/092 , H01L29/78 , H01L29/66
CPC分类号： H01L21/823821 , H01L27/0924 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A transistor device includes a substrate having a first region and a second region, a first semiconductor layer of a first semiconductor material having a first portion over the first region and a second portion over the second region, the first portion being separated from the second portion, a second semiconductor layer of a second semiconductor material over the second portion of the first semiconductor layer, a first transistor of a first conductivity type, the first transistor disposed within the first region and having a first set of source/drain regions formed in the first semiconductor layer, and a second transistor of a second conductivity type, the second transistor disposed within the second region and having a second set of source/drain regions formed in the second semiconductor layer. The second conductivity type is different than the second conductivity type, and the second semiconductor material is different from the first semiconductor material.

7. 发明申请

US20180047777A1 Deep Trench Isolation Structure and Method of Forming Same 审中-公开
公开(公告)号：US20180047777A1
公开(公告)日：2018-02-15
申请号：US15790242
申请日：2017-10-23
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Yeur-Luen Tu , Tung-I Lin , Cheng-Lung Wu , Wei-Li Chen
IPC分类号： H01L27/146
CPC分类号： H01L27/14683 , H01L27/1463 , H01L27/1464
摘要： Deep trench isolation (DTI) structures and methods of forming the same are provided. A method includes forming a plurality of photosensitive regions in a substrate. A recess is formed in the substrate, the substrate comprising a first semiconductor material, the recess being interposed between adjacent photosensitive regions. The recess is enlarged by removing a damaged layer of the substrate along sidewalls of the recess, thereby forming an enlarged recess. An epitaxial region is formed on sidewalls and a bottom of the enlarged recess, at least a portion of the epitaxial region comprising a second semiconductor material, the second semiconductor material being different from the first semiconductor material. A dielectric region is formed on the epitaxial region, the epitaxial region extending along a sidewall of the dielectric region.

8. 发明授权

US09887235B2 Pixel isolation device and fabrication method 有权
公开(公告)号：US09887235B2
公开(公告)日：2018-02-06
申请号：US14967046
申请日：2015-12-11
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Tung-I Lin , Wei-Li Chen , Yeur-Luen Tu
IPC分类号： H01L21/00 , H01L27/146
CPC分类号： H01L27/14689
摘要： Backside illuminated (BSI) image sensor devices are described as having pixel isolation structures formed on a sacrificial substrate. A photolayer is epitaxially grown over the pixel isolation structures. Radiation-detecting regions are formed in the photolayer adjacent to the pixel isolation structures. The pixel isolation structures include a dielectric material. The radiation-detecting regions include photodiodes. A backside surface of the BSI image sensor device is produced by planarized removal of the sacrificial substrate to physically expose the pixel isolation structures or at least optically expose the photolayer.

9. 发明申请

US20170278893A1 Deep Trench Isolation Structure and Method of Forming Same 有权
公开(公告)号：US20170278893A1
公开(公告)日：2017-09-28
申请号：US15079781
申请日：2016-03-24
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Hung Cheng , Yeur-Luen Tu , Tung-I Lin , Cheng-Lung Wu , Wei-Li Chen
IPC分类号： H01L27/146
CPC分类号： H01L27/14683 , H01L27/1463 , H01L27/1464
摘要： Deep trench isolation (DTI) structures and methods of forming the same are provided. A method includes forming a plurality of photosensitive regions in a substrate. A recess is formed in the substrate, the substrate comprising a first semiconductor material, the recess being interposed between adjacent photosensitive regions. The recess is enlarged by removing a damaged layer of the substrate along sidewalls of the recess, thereby forming an enlarged recess. An epitaxial region is formed on sidewalls and a bottom of the enlarged recess, at least a portion of the epitaxial region comprising a second semiconductor material, the second semiconductor material being different from the first semiconductor material. A dielectric region is formed on the epitaxial region, the epitaxial region extending along a sidewall of the dielectric region.

10. 发明授权

US11610808B2 Semiconductor wafer with low defect count and method for manufacturing thereof 有权
公开(公告)号：US11610808B2
公开(公告)日：2023-03-21
申请号：US16548862
申请日：2019-08-23
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
发明人： Yu-Hung Cheng , Cheng-Ta Wu , Yeur-Luen Tu , Ching-Pei Su , Tung-I Lin
IPC分类号： H01L21/762 , H01L29/34 , H01L21/306 , H01L21/02 , H01L21/461 , H01L21/465 , H01L29/167 , H01L29/36
摘要： A semiconductor wafer and method for manufacturing thereof are provided. The semiconductor wafer includes a handling substrate and a silicon layer over the handling substrate and having a {111} facet at an edge of a top surface of the silicon layer. The a defect count on the top surface of the silicon layer is less than about 15 each semiconductor wafer. The method includes the following operations: a semiconductor-on-insulator (SOI) substrate is provided, wherein the SOI substrate has a handling substrate, a silicon layer over the handling substrate, and a silicon germanium layer over the silicon layer; and the silicon germanium layer is etched at a first temperature with hydrochloric acid to expose a first surface of the silicon layer.

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