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1. 发明申请

US20160240375A1 STRESS MITIGATING AMORPHOUS SiO2 INTERLAYER 有权
标题翻译：应力缓和无定形SiO 2中间层
公开(公告)号：US20160240375A1
公开(公告)日：2016-08-18
申请号：US15031504
申请日：2014-10-27
申请人： TRANSLUCENT, INC.
发明人： Rytis Dargis , Andrew Clark , Erdem Arkun
IPC分类号： H01L21/02 , H01L33/12 , H01L33/32 , H01L33/00
CPC分类号： H01L21/02488 , C30B25/183 , C30B25/22 , C30B29/16 , C30B29/403 , H01L21/02381 , H01L21/02433 , H01L21/02483 , H01L21/02505 , H01L21/0254 , H01L33/007 , H01L33/12 , H01L33/32
摘要： A method of forming a REO dielectric layer and a layer of a-Si between a III-N layer and a silicon substrate. The method includes depositing single crystal REO on the substrate. The single crystal REO has a lattice constant adjacent the substrate matching the lattice constant of the substrate and a lattice constant matching a selected III-N material adjacent an upper surface. A uniform layer of a-Si is formed on the REO. A second layer of REO is deposited on the layer of a-Si with the temperature required for epitaxial growth crystallizing the layer of a-Si and the crystallized silicon being transformed to amorphous silicon after transferring the lattice constant of the selected III-N material of the first layer of REO to the second layer of REO, and a single crystal layer of the selected III-N material deposited on the second layer of REO.
摘要翻译：在III-N层和硅衬底之间形成REO电介质层和a-Si层的方法。该方法包括在衬底上沉积单晶REO。单晶REO具有与衬底匹配的衬底附近的晶格常数和与上表面相邻的选定III-N材料的晶格常数。在REO上形成均匀的a-Si层。第二层REO沉积在a-Si层上，外延生长所需的温度使a-Si层结晶，并且在转移所选择的III-N材料的晶格常数后，结晶硅转变为非晶硅 REO的第一层到REO的第二层，以及沉积在第二层REO上的所选III-N材料的单晶层。

2. 发明授权

US08748900B1 Re-silicide gate electrode for III-N device on Si substrate 有权
标题翻译： Si衬底上III-N器件的硅化物栅电极
公开(公告)号：US08748900B1
公开(公告)日：2014-06-10
申请号：US13851219
申请日：2013-03-27
申请人： Translucent, Inc.
发明人： Rytis Dargis , Andrew Clark , Erdem Arkun , Robin Smith , Michael Lebby
IPC分类号： H01L23/58 , H01L21/26 , H01L21/32
CPC分类号： H01L21/0254 , H01L21/02381 , H01L21/0245 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L21/28264 , H01L29/66522 , H01L29/78
摘要： A method of fabricating a rare earth silicide gate electrode on III-N material grown on a silicon substrate includes growing a single crystal stress compensating template on a silicon substrate. The template is substantially crystal lattice matched to the surface of the silicon substrate. A single crystal GaN structure is grown on the surface of the template and substantially crystal lattice matched to the template. An active layer of single crystal III-N material is grown on the GaN structure and substantially crystal lattice matched to the GaN structure. A single crystal monoclinic rare earth oxide dielectric layer is grown on the active layer of III-N material and a single crystal rare earth silicide gate electrode is grown on the dielectric layer, the silicide. Relative portions of the gadolinium metal and the silicon are adjusted during deposition so they react to form rare earth silicide during deposition.
摘要翻译：在硅衬底上生长的III-N材料上制造稀土硅化物栅电极的方法包括在硅衬底上生长单晶应力补偿模板。模板基本上与硅衬底的表面晶格匹配。在模板的表面上生长单晶GaN结构，并且基本上与模板匹配的晶格。在GaN结构上生长单晶III-N材料的有源层，并且基本上与GaN结构匹配的晶格。在III-N材料的有源层上生长单晶单斜的稀土氧化物电介质层，并且在介电层硅化物上生长单晶稀土硅化物栅电极。在沉积期间调整钆金属和硅的相对部分，使其在沉积期间反应以形成稀土硅化物。

3. 发明授权

US09496132B2 Nucleation of III-N on REO templates 有权
标题翻译： III-N在REO模板上的成核
公开(公告)号：US09496132B2
公开(公告)日：2016-11-15
申请号：US13845426
申请日：2013-03-18
申请人： TRANSLUCENT, INC.
发明人： Erdem Arkun , Andrew Clark , Rytis Dargis , Radek Roucka , Michael Lebby
IPC分类号： H01L21/02 , H01L29/20
CPC分类号： H01L21/02192 , H01L21/02247 , H01L21/02252 , H01L21/02381 , H01L21/02439 , H01L21/02458 , H01L21/02483 , H01L21/02488 , H01L21/02502 , H01L21/02505 , H01L21/0254 , H01L29/2003
摘要： A method of fabricating a layer of single crystal III-N material on a silicon substrate includes epitaxially growing a REO template on a silicon substrate. The template includes a REO layer adjacent the substrate with a crystal lattice spacing substantially matching the crystal lattice spacing of the substrate and selected to protect the substrate from nitridation. Either a rare earth oxynitride or a rare earth nitride is formed adjacent the upper surface of the template and a layer of single crystal III-N material is epitaxially grown thereon.
摘要翻译：在硅衬底上制造单晶III-N材料层的方法包括在硅衬底上外延生长REO模板。该模板包括与衬底相邻的REO层，晶体间距基本上与衬底的晶格间距相匹配，并被选择以保护衬底免受氮化。在模板的上表面附近形成稀土氮氧化物或稀土氮化物，并且在其上外延生长单晶III-N材料层。

4. 发明授权

US09824886B2 Stress mitigating amorphous SiO2 interlayer 有权
公开(公告)号：US09824886B2
公开(公告)日：2017-11-21
申请号：US15031504
申请日：2014-10-27
申请人： TRANSLUCENT, INC.
发明人： Rytis Dargis , Andrew Clark , Erdem Arkun
IPC分类号： H01L21/02 , C30B25/22 , C30B25/18 , C30B29/16 , C30B29/40 , H01L33/00 , H01L33/12 , H01L33/32
CPC分类号： H01L21/02488 , C30B25/183 , C30B25/22 , C30B29/16 , C30B29/403 , H01L21/02381 , H01L21/02433 , H01L21/02483 , H01L21/02505 , H01L21/0254 , H01L33/007 , H01L33/12 , H01L33/32
摘要： A method of forming a REO dielectric layer and a layer of a-Si between a III-N layer and a silicon substrate. The method includes depositing single crystal REO on the substrate. The single crystal REO has a lattice constant adjacent the substrate matching the lattice constant of the substrate and a lattice constant matching a selected III-N material adjacent an upper surface. A uniform layer of a-Si is formed on the REO. A second layer of REO is deposited on the layer of a-Si with the temperature required for epitaxial growth crystallizing the layer of a-Si and the crystallized silicon being transformed to amorphous silicon after transferring the lattice constant of the selected III-N material of the first layer of REO to the second layer of REO, and a single crystal layer of the selected III-N material deposited on the second layer of REO.

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