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1. 再颁专利

USRE40312E1 Digital data transmitting method 有权
标题翻译：数字数据传输方式
公开(公告)号：USRE40312E1
公开(公告)日：2008-05-13
申请号：US10785864
申请日：2004-02-25
申请人： Tadashi Kojima , Koichi Hirayama , Hisashi Yamada , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi , Shinichi Tanaka , Akira Kurahashi , Toshiyuki Shimada
发明人： Tadashi Kojima , Koichi Hirayama , Hisashi Yamada , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi , Shinichi Tanaka , Akira Kurahashi , Toshiyuki Shimada
IPC分类号： H04B14/04
CPC分类号： H03M5/145 , G11B20/1426 , H04L7/041 , H04L25/4906
摘要： A transmitting method of digital data whereby information data can be reproduced at a high precision. In order to retain digital data in sectors comprising a plurality of sync frames and sequentially transmit, the sync frame is comprised of the sync signal and the run length limited code which satisfies the limitations of the minimum run length and the maximum run length, and the sync signal includes the sync pattern constituted by a bit pattern of a run length that is longer than the maximum run length by only 3T and addition bit patterns which are arranged before and after the bit pattern and each of which has a urn length that is longer than the minimum run length. The sync signal includes a specific code which indicates a position in the sector and which enables the DC control to be performed.
摘要翻译：数字数据的发送方法，可以高精度地再现信息数据。为了在包括多个同步帧的扇区中保留数字数据并顺序地发送，同步帧包括满足最小游程长度和最大游程长度的限制的同步信号和游程长度限制码，并且同步信号包括由游程长度比最大游程长度仅3T的位模式构成的同步模式，以及排列在位模式之前和之后的相加位模式，并且每个模式的urn长度为长于最小游程长度。同步信号包括指示扇区中的位置并且能够执行DC控制的特定代码。

2. 发明授权

US5987066A Digital data transmitting method 失效
标题翻译：数字数据传输方式
公开(公告)号：US5987066A
公开(公告)日：1999-11-16
申请号：US759956
申请日：1996-12-03
申请人： Tadashi Kojima , Koichi Hirayama , Hisashi Yamada , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi , Shinichi Tanaka , Akira Kurahashi , Toshiyuki Shimada
发明人： Tadashi Kojima , Koichi Hirayama , Hisashi Yamada , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi , Shinichi Tanaka , Akira Kurahashi , Toshiyuki Shimada
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H04L7/04 , H04L7/08 , H04L25/49 , H04B14/04 , G11B3/90 , G11B5/09
CPC分类号： H03M5/145 , G11B20/1426 , H04L25/4906 , H04L7/041
摘要： A transmitting method of digital data whereby information data can be reproduced at a high precision. In order to retain digital data in sectors comprising a plurality of sync frames and sequentially transmit, the sync frame is comprised of the sync signal and the run length limited code which satisfies the limitations of the minimum run length and the maximum run length, and the sync signal includes the sync pattern constituted by a bit pattern of a run length that is longer than the maximum run length by only 3T and addition bit patterns which are arranged before and after the bit pattern and each of which has a run length that is longer than the minimum run length. The sync signal includes a specific code which indicates a position in the sector and which enables the DC control to be performed.
摘要翻译：数字数据的发送方法，可以高精度地再现信息数据。为了在包括多个同步帧的扇区中保留数字数据并顺序地发送，同步帧包括满足最小游程长度和最大游程长度的限制的同步信号和游程长度限制码，并且同步信号包括由游程长度比最大游程长度只有3T的游程长度的位模式构成的同步模式，以及排列在位模式之前和之后的游程长度更长的相加位模式比最小游程长。同步信号包括指示扇区中的位置并且能够执行DC控制的特定代码。

3. 发明授权

US5917857A Digital modulation apparatus, a digital modulation method, and a recording medium therefor 失效
标题翻译：数字调制装置，数字调制方法及其记录介质
公开(公告)号：US5917857A
公开(公告)日：1999-06-29
申请号：US764024
申请日：1996-12-11
申请人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi
发明人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama , Yoshiaki Moriyama , Fumihiko Yokogawa , Takao Arai , Toshifumi Takeuchi
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H04L25/49 , H04B14/04 , H03M7/00
CPC分类号： H03M5/145 , G11B20/1426
摘要： A digital modulation apparatus applies a method for converting data words to runlength-limited code words using plural conversion tables. The data words are converted to code words that significantly suppress the low frequency component of the final nonreturn-to-zero inverted signal.This digital modulation apparatus includes ROM tables for storing plural conversion tables containing the runlength-limited code words corresponding to the data words; end-runlength memories and evaluators for determining whether the runlength-limit constraints are satisfied in the interconnection between two consecutive code words when the data words to be converted are supplied; and a DSV controller for storing each of the code words that can be selected from two conversion tables to buffer memories when the runlength-limit constraints are satisfied, and selecting the code words wit the greatest effect suppressing the low frequency component in the obtained signal when the code words are NRZI converted.
摘要翻译：数字调制装置应用一种使用多个转换表将数据字转换成游程长度限制码字的方法。数据字被转换成显着抑制最终的非归零到反相信号的低频分量的码字。该数字调制装置包括用于存储包含对应于数据字的游程限制码字的多个转换表的ROM表; 终端游程长度存储器和评估器，用于在提供要转换的数据字时确定在两个连续码字之间的互连中是否满足游程限制约束; 以及DSV控制器，用于当满足游程长度限制约束时，将可从两个转换表中选择的每个代码字存储到缓冲存储器，并且选择在获得的信号中抑制低频分量的最大效应的代码字，代码字被NRZI转换。

4. 发明授权

US5881037A Recording medium, recording method and apparatus, and reproduction method and apparatus 失效
标题翻译：记录介质，记录方法和装置以及再现方法和装置
公开(公告)号：US5881037A
公开(公告)日：1999-03-09
申请号：US887944
申请日：1997-07-01
申请人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama
发明人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama
IPC分类号： G11B20/10 , G11B20/12 , G11B20/14 , G11B20/18 , G11B27/30 , H03M7/14 , G11B7/00 , G11B7/24 , H04N5/76
CPC分类号： G11B27/3027 , G11B20/1426 , G11B20/1813
摘要： A digital video disk stores data codes and multifunctional synchronization codes in a data structure. The synchronization codes contain type information code identifying whether the synchronization code is located in a code sequence at the beginning of the data block, the beginning of a data block sector other than the first sector in the data block, the beginning of a line, or the middle of a line. The type information is expressed by two alternative patterns, type information code 1 and type information code 2, expressing the same information and differing in the number of is in the 5-bit sequence, i.e., an odd or even number of 1s. Which one of the two type information code pattern is used is selected according to the DSV so as to minimize bias in the dc component of the frame following the synchronization code.
摘要翻译：数字视频盘在数据结构中存储数据代码和多功能同步代码。同步码包含识别同步代码是否位于数据块开始处的代码序列中的类型信息代码，除了数据块中的第一扇区之外的数据块扇区的开始，行的开头，或者一条线的中间类型信息由表示相同信息的类型信息码1和类型信息码2的两种替代模式表示，5位序列中的数量，即奇数或偶数1。根据DSV选择使用两种类型信息码模式中的哪一种，以便最小化跟随同步码的帧的直流分量中的偏差。

5. 发明授权

US5912869A Recording medium data transmission method and apparatus and data reproduction method and apparatus 失效
标题翻译：记录介质数据传输方法及装置及数据再现方法及装置
公开(公告)号：US5912869A
公开(公告)日：1999-06-15
申请号：US626551
申请日：1996-04-02
申请人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama
发明人： Shin-ichi Tanaka , Toshiyuki Shimada , Tadashi Kojima , Koichi Hirayama
IPC分类号： G11B20/12 , G11B20/14 , G11B27/19 , G11B27/30 , H03M5/14 , H03M7/14 , H03M13/23 , H04B14/04 , H04L1/00 , H04L7/04 , H04L25/49 , G11B5/76 , G11B5/09
CPC分类号： H04L1/0057 , G11B20/1217 , G11B20/1426 , G11B27/19 , G11B27/3027 , H03M13/23 , H03M5/145 , H04L25/4908 , G11B2220/20 , H04L7/041
摘要： A data transmission apparatus for transmitting an original data has a converter for converting the original data to sequential data codes. The data code is formed by a combination of HIGH level binary codes and LOW level binary codes. The maximum length of a continuous binary codes of one level, such as HIGH level, in the data codes is limited to T.sub.max, e.g., to 14T, in which T is a unit length representing one binary code, and the minimum length of a continuous binary codes of one level, such as HIGH level, in the data codes is limited to T.sub.min, e.g., 3T. A generator generates a synchronization code. The synchronization code is formed by a combination of HIGH and LOW level binary codes. The synchronization code comprises an identifier having a continuous binary codes of one level, such as HIGH level, with a predetermined length 16T which is 2T greater than T.sub.max. An inserter inserts the synchronization code intermittently in the sequential data codes.
摘要翻译：用于发送原始数据的数据发送装置具有用于将原始数据转换为顺序数据代码的转换器。数据代码由高级二进制代码和低级二进制代码的组合形成。数据码中一个等级的连续二进制码（如高电平）的最大长度限制在Tmax，例如14T，其中T是表示一个二进制码的单位长度，连续的最小长度数据码中一级的二进制码（如高电平）被限制为Tmin，例如3T。生成器生成同步代码。同步码由高和低电平二进制码的组合形成。同步码包括具有一个等级的连续二进制码的标识符，例如高电平，具有比Tmax大2T的预定长度16T。插入器在顺序数据代码中间歇地插入同步代码。

6. 发明授权

US5774078A Single merging bit DC-suppressed run length limited coding 失效
标题翻译：单合并位直流抑制运行长度限制编码
公开(公告)号：US5774078A
公开(公告)日：1998-06-30
申请号：US628167
申请日：1996-04-05
申请人： Shin-ichi Tanaka , Toshiyuki Shimada , Koichi Hirayama , Hisashi Yamada
发明人： Shin-ichi Tanaka , Toshiyuki Shimada , Koichi Hirayama , Hisashi Yamada
IPC分类号： G11B20/14 , H03M5/14 , H03M7/14 , H04L25/49 , H03M5/06
CPC分类号： G11B20/1426 , H03M5/145 , G11B2020/1469
摘要： The information to be recorded is divided into 8-bit long data words. Each data word is then converted to 14-bit long code word. The code words are sequentially connected with a one-bit merging bit inserted between the code words to define a code bit sequence. The run-length of 0s in the code bit sequence is limited to be between 2 and 11. The one-bit merging bit normally takes a bit value of 0, but is changed to 1 when any one of the T.sub.min control or T.sub.max control is applied so as to accomplish the run-length limitation. The T.sub.min control is applied when the adjacent bits on both sides of the merging bit are 1s. The T.sub.max control is applied when trailing P bits of a code word preceding the merging bit and leading Q bits of a code word following the merging bit are all 0s, provided that P+Q.gtoreq.11, and in this case, at least either one of the P bits and Q bits has a bit sequence of (00000), and the bit sequence (00000) is changed to (00100).
摘要翻译：要记录的信息被分为8位长的数据字。然后将每个数据字转换成14位长码字。代码字与插入在代码字之间的一位合并位顺序连接，以定义代码位序列。码位序列中的0的行程长度限制在2到11之间。一位合并位通常取值为0，但当任何一个Tmin控制或Tmax控制为应用以实现游程限制。当合并位两侧的相邻位为1时，应用Tmin控制。如果P + Q> / = 11，并且在这种情况下，至少在合并位之后的码字的尾部P位和合并位之后的码字的前导Q位都为0，则应用Tmax控制 P位和Q位中的任一个具有（00000）的位序列，并且将位序列（00000）改变为（00100）。

7. 发明授权

US5729224A Code conversion and demodulation apparatus, a method thereof, and a recording medium 失效
标题翻译：码转换和解调装置，其方法和记录介质
公开(公告)号：US5729224A
公开(公告)日：1998-03-17
申请号：US629941
申请日：1996-04-12
申请人： Koichi Hirayama , Yoshiyuki Ishizawa , Shinichi Tanaka , Toshiyuki Shimada
发明人： Koichi Hirayama , Yoshiyuki Ishizawa , Shinichi Tanaka , Toshiyuki Shimada
IPC分类号： G11B20/14 , H03M5/14 , H03M7/00
CPC分类号： G11B20/1426 , H03M5/145
摘要： Source data each consisting of m-bits can be converted into conversion codes each consisting of n (>m) bits with ease, and reverse conversion thereof can be performed with ease. The code conversion and the reverse conversion can be characterized in terms of a series of tables. The current input source data and the next input source data are respectively taken in by registers. Whether or not the run length at a connecting portion between consecutive source data satisfies conditions is determined by a control unit, and a table to be used is selected to finally obtain a conversion code.
摘要翻译：每个由m位组成的源数据可以被容易地转换成各自由n（> m）位组成的转换代码，并且可以容易地进行其反向转换。代码转换和反向转换可以通过一系列表来表征。当前输入源数据和下一个输入源数据分别由寄存器取入。连续源数据之间的连接部分的行程长度是否满足条件由控制单元确定，并且选择要使用的表以最终获得转换代码。

8. 发明授权

US5166914A Data recording/reproducing apparatus with two-dimensional equalizer for crosstalk cancellation 失效
标题翻译：数据记录/再生装置与二维均衡器进行CROSSTALK CANCELLATION
公开(公告)号：US5166914A
公开(公告)日：1992-11-24
申请号：US454501
申请日：1989-12-21
申请人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
发明人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
IPC分类号： G11B7/0037 , G11B11/105 , G11B20/10 , G11B20/22
CPC分类号： G11B20/10037 , G11B11/10515 , G11B11/1053 , G11B11/10576 , G11B20/10 , G11B20/10009 , G11B20/10046 , G11B20/10222 , G11B20/22 , G11B7/0037
摘要： An equalizer apparatus is applied to a DBF disk recording medium in which a sampling clock is reproduced from clock pits recorded on the disk recording medium. A fixed coefficient equalizer includes an analog to digital converter, a memory and a two-dimension equalizer. The fixed coefficient equalizer suppresses interference from adjacent tracks and reduces the error rate of the reproduced data caused by crosstalk even in the case of a narrow track pitch. Further, by adding to the equalizer a sign detector, a FIR low-pass filter and a coefficient control circuit to form a variable coefficient equalizer, interference fluctuation attributed to the linear recording density, recording power irregularity, light spot shape, tracking error, etc., can be automatically compensated to suppress the equalization error caused by such fluctuation. Further, using the variable coefficient equalizer, clocking timing errors and fluctuations can be automatically and efficiently compensated.

9. 发明授权

US5057945A Signal recording/reproducing apparatus 失效
标题翻译：信号记录/再现设备
公开(公告)号：US5057945A
公开(公告)日：1991-10-15
申请号：US531430
申请日：1990-05-31
申请人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
发明人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
IPC分类号： G11B5/012 , G11B5/09 , G11B5/48 , G11B20/10 , G11B20/22 , G11B21/00
CPC分类号： G11B5/09 , G11B20/10 , G11B20/22 , G11B21/003 , G11B5/012 , G11B5/4886
摘要： A signal recording/reproducing apparatus equipped with a recording head section for recording signals on a recording medium and a reproducing head section for reproducing the signals recorded on the recording medium. The recording head section is arranged to record the signal to form N recording sub-tracks on the recording medium and the reproducing head section has M reproducing sub-heads which trace the N recording sub-tracks to reproduce the recording signal. The pitch of the M sub-heads thereof is equal to a pitch of the recording sub-tracks and the number M of the sub-heads is greater than the number N of the recording sub-tracks. The reproducing head section is coupled to a reproduction signal detecting section which is turn eliminates the interference and the crosstalk between adjacent tracks from the reproduced signal due to the reproducing head section. This arrangement allows narrowing the track pitch to increase the recording capacity and extremely improving the transfer rate concurrently with the elimination of the interference between the adjacent codes and crosstalk between the adjacent tracks.

10. 发明授权

US5056116A Data demodulation apparatus 失效
标题翻译：数据解调装置
公开(公告)号：US5056116A
公开(公告)日：1991-10-08
申请号：US357737
申请日：1989-05-26
申请人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
发明人： Toshiyuki Shimada , Kazuhiro Aoki , Akira Kurahashi , Noboru Kikuchi
IPC分类号： G11B20/14 , H03H17/08 , H04L7/027 , H04L25/40
CPC分类号： G11B20/10037 , G11B20/1426
摘要： A data demodulation apparatus applicable to a playback input signal from a digital recording apparatus, which executes A/D conversion of the input signal with a sampling period that is equal to the bit separation of that signal, and obtains phase data for reproducing the phase of the clock signal component of the input signal each time that a "1" state bit is detected in a sampling period. For each sampling period, or set of successive sampling periods, data values are derived which respectively represent a number of bit positions of the input signal within that period and the presence or absence of "1" state bits in the period, and these data values are converted to serial form to respectively constitute a reproduced clock signal and a detected data signal.

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