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1. 发明申请

US20230063087A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230063087A1
公开(公告)日：2023-03-02
申请号：US17460075
申请日：2021-08-27
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao Lin , Chen-Ping Chen , Chieh-Ning Feng , Hsiao Wen Lee , Chih-Han Lin
IPC分类号： H01L27/092 , H01L29/06 , H01L29/423 , H01L29/786 , H01L21/02 , H01L21/8238 , H01L29/66
摘要： A method includes forming a first, second, third, fourth, fifth, and sixth fin structure. The second fin structure is separated from each of the first and third fin structures by a first distance, the fifth fin structure is separated from each of the fourth and sixth fin structures by the first distance, and the third fin structure is separated from the fourth fin structure by a second distance greater than the first distance. The method includes forming a first dummy gate structure overlaying the first through third fin structures, and a second dummy gate structure overlaying the fourth through sixth fin structures; forming a number of source/drain structures that are coupled to the first, second, third, fourth, fifth, and sixth fin structures, respectively; and replacing the third fin structure with a first dielectric structure, and replacing the fourth fin structure with a second dielectric structure.

2. 发明申请

US20230060742A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230060742A1
公开(公告)日：2023-03-02
申请号：US17459865
申请日：2021-08-27
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao Lin , Chih-Han Lin , Chen-Ping Chen , Hsiao Wen Lee
IPC分类号： H01L21/8234 , H01L27/088
摘要： A semiconductor device includes a first stack structure, a second stack structure, and a third stack structure. Each of the stack structure includes semiconductor layers vertically spaced from one another. The first, second, and third stack structures all extend along a first lateral direction. The second stack structure is disposed between the first and third stack structures. The semiconductor device includes a first gate structure that extends along a second lateral direction and wraps around each of the semiconductor layers. The semiconductor layers of the first stack structure are coupled with respective source/drain structures. The semiconductor layers of the second stack structure are coupled with respective source/drain structures. The semiconductor layers of the third stack structure are coupled with a dielectric passivation layer.

3. 发明授权

US11552195B2 Semiconductor devices and methods of manufacturing thereof 有权
公开(公告)号：US11552195B2
公开(公告)日：2023-01-10
申请号：US17230414
申请日：2021-04-14
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao Lin , Hsiao Wen Lee , Li-Jung Kuo , Chen-Ping Chen , Ming-Ching Chang
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L29/78 , H01L29/06 , H01L21/8234 , H01L29/66
摘要： A semiconductor device in a first area includes first non-planar semiconductor structures separated with a first distance, and a first isolation region including a first layer and a second layer that collectively embed a lower portion of each of the first non-planar semiconductor structures. At least one of the first layer or second layer of the first isolation region is in a cured state. The semiconductor device in a second area includes second non-planar semiconductor structures separated with a second distance, and a second isolation region including a first layer and a second layer that collectively embed a lower portion of each of the second non-planar semiconductor structures. At least one of the first or second layer of the second isolation region is in a cured state.

4. 发明申请

US20230067425A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230067425A1
公开(公告)日：2023-03-02
申请号：US17460203
申请日：2021-08-28
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao Lin , Chen-Ping Chen , Chen-Yui Yang , Hsiao Wen Lee , Ming-Ching Chang
IPC分类号： H01L21/8234 , H01L27/088
摘要： A semiconductor device includes a first plurality of channel layers. The first plurality of channel layers extend along a first direction. The semiconductor device includes a second plurality of channel layers. The second plurality of channel layers also extend along the first direction. The semiconductor de123329-vice includes a first dielectric fin structure that also extends along the first direction. The semiconductor device includes a first gate structure that extends along a second direction. The first gate structure comprises a first portion that wraps around each of the first plurality of channel layers and a second portion that wraps around each of the second plurality of channel layers. The first dielectric fin structure separates the first and second portions from each other. The first gate structure comprises a third portion that connects the first and second portions to each other and is vertically disposed below the first dielectric fin structure.

5. 发明申请

US20230016605A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230016605A1
公开(公告)日：2023-01-19
申请号：US17376960
申请日：2021-07-15
申请人： Taiwan Semiconductor Manufacturing Company Ltd.
发明人： Shih-Yao Lin , Chao-Cheng Chen , Chih-Han Lin , Chen-Ping Chen , Ming-Ching Chang , Chia-Hao Yu , Hsiao Wen Lee
IPC分类号： H01L29/417 , H01L29/423 , H01L29/786 , H01L29/06 , H01L29/66 , H01L21/8234 , H01L21/311
摘要： A method of fabricating a semiconductor device is described. A plurality of fins is formed over a substrate. Dummy gates are formed patterned over the fins, each dummy gate having a spacer on sidewalls of the patterned dummy gates. Recesses are formed in the fins using the patterned dummy gates as a mask. A passivation layer is formed over the fins and in the recesses in the fins. The passivation layer is patterned to leave a remaining passivation layer only in some of the recesses in the fins. Source and drain regions are epitaxially formed only in the recesses in the fins without the remaining passivation layer.

6. 发明授权

US09543210B2 Forming crown active regions for FinFETs 有权
标题翻译：形成FinFET的凸起有源区域
公开(公告)号：US09543210B2
公开(公告)日：2017-01-10
申请号：US14846754
申请日：2015-09-05
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chen-Ping Chen , Hui-Min Lin , Ming-Jie Huang , Tung Ying Lee
IPC分类号： H01L29/00 , H01L21/8234 , H01L29/66 , H01L29/78
CPC分类号： H01L21/823431 , H01L21/823437 , H01L21/823481 , H01L29/66795 , H01L29/7848 , H01L29/785
摘要： A method includes forming a first mask over a substrate through a double patterning process, wherein the first mask comprises a horizontal portion and a plurality of vertical portions protruding over the horizontal portion, and wherein the vertical portions are spaced apart from each other, applying a first etching process to the first mask until a top surface of a portion of the substrate is exposed, applying a second etching process to the substrate to form intra-device openings and inter-device openings, wherein the inter-device openings are formed at the exposed portion of the substrate, filling the inter-device openings and the intra-device openings to form inter-device insulation regions and intra-device insulation regions and etching back the inter-device insulation regions and the intra-device insulation regions to form a plurality of fins protruding over top surfaces of the inter-device insulation regions and the intra-device insulation regions.
摘要翻译：一种方法包括通过双重图案化工艺在衬底上形成第一掩模，其中第一掩模包括在水平部分上突出的水平部分和多个垂直部分，并且其中垂直部分彼此间隔开，对所述第一掩模进行第一蚀刻处理，直到所述基板的一部分的顶表面露出，对所述基板施加第二蚀刻工艺以形成器件内部开口和器件间开口，其中所述器件间开口形成在衬底的暴露部分，填充器件间开口和器件内开口以形成器件间绝缘区域和器件内绝缘区域，并且蚀刻器件间绝缘区域和器件内绝缘区域以形成多个翅片突出在器件间绝缘区域的顶表面和器件间绝缘区域之间。

7. 发明申请

US20230119370A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230119370A1
公开(公告)日：2023-04-20
申请号：US18066777
申请日：2022-12-15
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao Lin , Hsiao Wen Lee , Li-Jung Kuo , Chen-Ping Chen , Ming-Ching Chang
IPC分类号： H01L29/78 , H01L29/06 , H01L21/8234 , H01L29/66
摘要： A semiconductor device in a first area includes first non-planar semiconductor structures separated with a first distance, and a first isolation region including a first layer and a second layer that collectively embed a lower portion of each of the first non-planar semiconductor structures. At least one of the first layer or second layer of the first isolation region is in a cured state. The semiconductor device in a second area includes second non-planar semiconductor structures separated with a second distance, and a second isolation region including a first layer and a second layer that collectively embed a lower portion of each of the second non-planar semiconductor structures. At least one of the first or second layer of the second isolation region is in a cured state.

8. 发明申请

US20220367672A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20220367672A1
公开(公告)日：2022-11-17
申请号：US17873978
申请日：2022-07-26
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shih-Yao LIN , Chen-Ping Chen , Kuei-Yu Kao , Hsiao Wen Lee , Chih-Han Lin
IPC分类号： H01L29/66 , H01L29/06 , H01L21/8234 , H01L27/088 , H01L29/78
摘要： A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.

9. 发明授权

US11605727B2 Method of manufacturing a semiconductor device and a semiconductor device 有权
公开(公告)号：US11605727B2
公开(公告)日：2023-03-14
申请号：US17368496
申请日：2021-07-06
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Shu-Wen Shen , Chen-Ping Chen
IPC分类号： H01L29/66 , H01L21/8234 , H01L29/06 , H01L29/423 , H01L29/78
摘要： In a method of manufacturing a semiconductor device, a fin structure including a stacked layer of first and second semiconductor layers and a hard mask layer over the stacked layer is formed. A sacrificial cladding layer is formed over at least sidewalls of the exposed hard mask layer and stacked layer. An etching is performed to remove lateral portions of the sacrificial cladding layer, thereby leaving the sacrificial cladding layer on sidewalls of the exposed hard mask layer and stacked layer. A first dielectric layer and a second dielectric layer made of a different material than the first dielectric layer are formed. The second dielectric layer is recessed, and a third dielectric layer made of a different material than the second dielectric layer is formed on the recessed second dielectric layer. During the etching operation, a protection layer is formed over the sacrificial cladding layer.

10. 发明申请

US20230061815A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THEREOF 有权
公开(公告)号：US20230061815A1
公开(公告)日：2023-03-02
申请号：US17460213
申请日：2021-08-28
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Kuei-Yu Kao , Chao-Cheng Chen , Chih-Han Lin , Chen-Ping Chen , Ming-Ching Chang , Shih-Yao Lin , Chih-Chung Chiu
IPC分类号： H01L29/423 , H01L29/66 , H01L29/786 , H01L21/8234 , H01L29/06
摘要： A semiconductor device includes a plurality of semiconductor layers vertically separated from one another. The semiconductor device includes a gate structure that comprises a lower portion and an upper portion, wherein the lower portion wraps around each of the plurality of semiconductor layers. The semiconductor device includes a gate spacer that extends along a sidewall of the upper portion of the gate structure and has a bottom surface. A portion of the bottom surface of the gate spacer and a top surface of a topmost one of the plurality of semiconductor layers form an angle that is less than 90 degrees.

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