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1. 发明申请

US20220310532A1 PACKAGE STRUCTURE AND METHODS OF MANUFACTURING THE SAME 有权
公开(公告)号：US20220310532A1
公开(公告)日：2022-09-29
申请号：US17363030
申请日：2021-06-30
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shu-Shen Yeh , Po-Yao Lin , Chin-Hua Wang , Chia-Kuei Hsu , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/16 , H01L23/31 , H01L23/538 , H01L23/367 , H01L23/58 , H01L21/683 , H01L21/48 , H01L21/56
摘要： A package structure includes a circuit substrate, a semiconductor device and a ring structure. The circuit substrate has a first region and a second region connected thereto. The circuit substrate includes at least one routing layer including a dielectric portion and a conductive portion disposed thereon. A first ratio of a total volume of the conductive portion of the routing layer within the first region to a total volume of the dielectric and conductive portions of the routing layer within the first region is less than a second ratio of a total volume of the conductive portion of the routing layer within the second region to a total volume of the dielectric and conductive portions of the routing layer within the second region. The semiconductor device is disposed over the circuit substrate within the first region, and is electrically coupled to the circuit substrate. The ring structure is disposed over the circuit substrate within the second region.

2. 发明授权

US11410939B2 Chip package with lid 有权
公开(公告)号：US11410939B2
公开(公告)日：2022-08-09
申请号：US17034891
申请日：2020-09-28
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Shu-Shen Yeh , Chin-Hua Wang , Kuang-Chun Lee , Po-Yao Lin , Shyue-Ter Leu , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/04 , H01L23/10 , H01L23/367 , H01L23/498
摘要： Structures and formation methods of a chip package are provided. The chip package includes a substrate and a semiconductor die over the substrate. The chip package also includes a lid covering a top surface of the semiconductor die. The lid has a first support structure and a second support structure, and the first support structure and the second support structure are positioned at respective corner portions of the substrate. An opening penetrates through the lid to expose a space containing the semiconductor die, and the lid has a side edge extending from an edge of the first support structure to an edge of the second support structure.

3. 发明申请

US20230061968A1 SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME 有权
公开(公告)号：US20230061968A1
公开(公告)日：2023-03-02
申请号：US17460356
申请日：2021-08-30
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Sheng Lin , Chin-Hua Wang , Shu-Shen Yeh , Chien-Hung Chen , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/31 , H01L23/498 , H01L25/18 , H01L23/00 , H01L25/00 , H01L21/56 , H01L21/78
摘要： An semiconductor package includes a redistribution structure, a first semiconductor device, a second semiconductor device, an underfill layer and an encapsulant. The first semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the first semiconductor device has a first bottom surface, a first top surface and a first side surface connecting with the first bottom surface and the first top surface, the first side surface comprises a first sub-surface and a second sub-surface connected with each other, the first sub-surface is connected with the first bottom surface, and a first obtuse angle is between the first sub-surface and the second sub-surface. The second semiconductor device is disposed on and electrically connected with the redistribution structure, wherein the second semiconductor device has a second bottom surface, a second top surface and a second side surface connecting with the second bottom surface and the second top surface, the second side surface faces toward to the first side surface, the second side surface comprises a third sub-surface and a fourth sub-surface connected with each other, the third sub-surface is connected with the second bottom surface, and a second obtuse angle is between the third sub-surface and the fourth sub-surface. The underfill layer is between the first semiconductor device and the second semiconductor device, between the first semiconductor device and the redistribution structure, and between the second semiconductor device and the redistribution structure. The encapsulant encapsulates the first semiconductor device, the second semiconductor device and the underfill layer.

4. 发明授权

US11450622B2 Semiconductor package 有权
公开(公告)号：US11450622B2
公开(公告)日：2022-09-20
申请号：US17152797
申请日：2021-01-20
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chin-Hua Wang , Shu-Shen Yeh , Yu-Sheng Lin , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/12 , H01L23/00 , H01L23/367 , H01L23/498
摘要： A semiconductor package provided herein includes a wiring substrate, a semiconductor component, conductor terminals, a bottom stiffener and a top stiffener. The wiring substrate has a first surface and a second surface opposite to the first surface. The semiconductor component is disposed on the first surface of the wiring substrate. The conductor terminals are disposed on the second surface of the wiring substrate and electrically connected to the semiconductor component through the wiring substrate. The bottom stiffener is disposed on the second surface of the wiring substrate and positioned between the conductor terminals. The top stiffener is disposed on the first surface of the wiring substrate. The top stiffener is laterally spaced further away from the semiconductor component than the bottom stiffener.

5. 发明申请

US20230114584A1 PACKAGE STRUCTURE 有权
公开(公告)号：US20230114584A1
公开(公告)日：2023-04-13
申请号：US18080674
申请日：2022-12-13
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Yen Lee , Chin-Hua Wang , Ming-Chih Yew , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/16 , H01L23/31 , H01L23/40
摘要： A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die. The insulating encapsulation covers the organic interposer substrate and laterally encapsulates the least one semiconductor die and the underfill.

6. 发明申请

US20220301971A1 PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME 有权
公开(公告)号：US20220301971A1
公开(公告)日：2022-09-22
申请号：US17367401
申请日：2021-07-04
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Yu-Sheng Lin , Po-Yao Lin , Shu-Shen Yeh , Chin-Hua Wang , Shin-Puu Jeng
IPC分类号： H01L23/367 , H01L25/065 , H01L25/18
摘要： A package structure includes a circuit substrate, a semiconductor package, a thermal interface material, a lid structure and a heat dissipation structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The thermal interface material is disposed on the semiconductor package. The lid structure is disposed on the circuit substrate and surrounding the semiconductor package, wherein the lid structure comprises a supporting part that is partially covering and in physical contact with the thermal interface material. The heat dissipation structure is disposed on the lid structure and in physical contact with the supporting part of the lid structure.

7. 发明申请

US20220278065A1 PACKAGE STRUCTURE 有权
公开(公告)号：US20220278065A1
公开(公告)日：2022-09-01
申请号：US17185992
申请日：2021-02-26
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Yen Lee , Chin-Hua Wang , Ming-Chih Yew , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/40 , H01L23/16 , H01L23/31
摘要： A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die. The insulating encapsulation covers the organic interposer substrate and laterally encapsulates the least one semiconductor die and the underfill.

8. 发明申请

US20230066370A1 SEMICONDUCTOR PACKAGES 有权
公开(公告)号：US20230066370A1
公开(公告)日：2023-03-02
申请号：US17458560
申请日：2021-08-27
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chia-Kuei Hsu , Ming-Chih Yew , Po-Chen Lai , Chin-Hua Wang , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/498 , H01L23/00 , H01L23/31
摘要： A semiconductor package includes a die, a redistribution structure and a plurality of conductive terminals. The redistribution structure is disposed below and electrically connected to the die. The redistribution structure includes a plurality of conductive patterns, and at least one of the plurality of conductive patterns has a cross-section substantially parallel to the surface of the die. The cross-section has a long-axis and a short-axis, and the long-axis intersects with a center axis of the die. The conductive terminals are disposed below and electrically connected to the redistribution structure.

9. 发明申请

US20230063692A1 THREE-DIMENSIONAL INTEGRATED CIRCUIT PACKAGES AND METHODS OF FORMING THE SAME 有权
公开(公告)号：US20230063692A1
公开(公告)日：2023-03-02
申请号：US17460353
申请日：2021-08-30
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chin-Hua Wang , Yu-Sheng Lin , Chia-Kuei Hsu , Shu-Shen Yeh , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L27/06 , H01L23/14 , H01L23/31 , H01L23/528 , H01L23/00
摘要： In an embodiment, a three-dimensional integrated circuit (3DIC) package includes an interposer, a plurality of connection pads, a plurality of dummy patterns, a plurality of integrated circuit structures and an underfill layer. The connection pads are disposed on and electrically connected to a first side of the interposer. The dummy patterns are disposed on the first side of the interposer and around the plurality of connection pads. The integrated circuit structures are electrically connected to the connection pads through a plurality of first bumps. The underfill layer surrounds the first bumps and covers the dummy patterns.

10. 发明授权

US11557559B2 Package structure 有权
公开(公告)号：US11557559B2
公开(公告)日：2023-01-17
申请号：US17185992
申请日：2021-02-26
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Yen Lee , Chin-Hua Wang , Ming-Chih Yew , Po-Yao Lin , Shin-Puu Jeng
IPC分类号： H01L23/00 , H01L23/40 , H01L23/16 , H01L23/31
摘要： A package structure including an organic interposer substrate, a semiconductor die, conductive bumps, an underfill, and an insulating encapsulation is provided. The organic interposer substrate includes stacked organic dielectric layers and conductive wirings embedded in the stacked organic dielectric layers. The semiconductor die is disposed over and electrically connected to the conductive wirings of the organic interposer substrate, and the semiconductor die includes chamfered edges. The conductive bumps are disposed between the semiconductor die and the organic interposer substrate, and the semiconductor die is electrically connected to the organic interposer substrate through the conductive bumps. The underfill is disposed between the semiconductor die and the organic interposer substrate, wherein the underfill encapsulates the conductive bumps and is in contact with the chamfered edges of the at least one semiconductor die. The insulating encapsulation covers the organic interposer substrate and laterally encapsulates the least one semiconductor die and the underfill.

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