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1. 发明申请

US20220173245A1 Method for Fabricating a Strained Structure and Structure Formed 有权
公开(公告)号：US20220173245A1
公开(公告)日：2022-06-02
申请号：US17671042
申请日：2022-02-14
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Lin Lee , Chih-Hao Chang , Chih-Hsin Ko , Feng Yuan , Jeff J. Xu
IPC分类号： H01L29/78 , H01L29/66 , H01L29/165 , H01L21/76 , H01L21/02 , H01L21/306 , H01L21/31 , H01L21/311 , H01L29/06 , H01L29/08
摘要： A field effect transistor includes a substrate comprising a fin structure. The field effect transistor further includes an isolation structure in the substrate. The field effect transistor further includes a source/drain (S/D) recess cavity below a top surface of the substrate. The S/D recess cavity is between the fin structure and the isolation structure. The field effect transistor further includes a strained structure in the S/D recess cavity. The strain structure includes a lower portion. The lower portion includes a first strained layer, wherein the first strained layer is in direct contact with the isolation structure, and a dielectric layer, wherein the dielectric layer is in direct contact with the substrate, and the first strained layer is in direct contact with the dielectric layer. The strained structure further includes an upper portion comprising a second strained layer overlying the first strained layer.

2. 发明授权

US10134847B2 FinFET structures and methods of forming the same 有权
公开(公告)号：US10134847B2
公开(公告)日：2018-11-20
申请号：US15589788
申请日：2017-05-08
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chih Chieh Yeh , Cheng-Yi Peng , Tsung-Lin Lee
IPC分类号： H01L29/66 , H01L29/15 , H01L21/306 , H01L27/088 , H01L29/10 , H01L29/78 , H01L21/8238 , H01L21/762 , H01L27/092 , H01L29/08
摘要： FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain regions, a dielectric layer, and a gate electrode. The channel region includes semiconductor layers above a substrate. Each of the semiconductor layers is separated from neighboring ones of the semiconductor layers, and each of the semiconductor layers has first and second sidewalls. The first and second sidewalls are aligned along a first and second plane, respectively, extending perpendicularly to the substrate. The first and second source/drain regions are disposed on opposite sides of the channel region. The semiconductor layers extend from the first source/drain region to the second source/drain region. The dielectric layer contacts the first and second sidewalls of the semiconductor layers, and the dielectric layer extends into a region between the first plane and the second plane. The gate electrode is over the dielectric layer.

3. 发明授权

US09711412B2 FinFETs with different fin heights 有权
公开(公告)号：US09711412B2
公开(公告)日：2017-07-18
申请号：US15242072
申请日：2016-08-19
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
IPC分类号： H01L21/8244 , H01L21/8234 , H01L27/088 , H01L29/66 , H01L21/266 , H01L21/762 , H01L27/11 , H01L29/06 , H01L29/417 , H01L29/78
CPC分类号： H01L21/823431 , H01L21/266 , H01L21/76224 , H01L21/823437 , H01L21/823481 , H01L27/0886 , H01L27/1104 , H01L27/1116 , H01L29/0649 , H01L29/41791 , H01L29/66795 , H01L29/785
摘要： An integrated circuit structure includes a semiconductor substrate including a first portion in a first device region, and a second portion in a second device region. A first semiconductor fin is over the semiconductor substrate and has a first fin height. A second semiconductor fin is over the semiconductor substrate and has a second fin height. The first fin height is greater than the second fin height.

4. 发明申请

US20160365414A1 FINFET Structures and Methods of Forming the Same 有权
标题翻译： FINFET结构及其形成方法
公开(公告)号：US20160365414A1
公开(公告)日：2016-12-15
申请号：US14739928
申请日：2015-06-15
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Cheng-Yi Peng , Chih Chieh Yeh , Tsung-Lin Lee
IPC分类号： H01L29/15 , H01L21/306 , H01L27/088 , H01L29/66 , H01L29/78 , H01L29/10
CPC分类号： H01L29/155 , H01L21/30604 , H01L21/76224 , H01L21/823807 , H01L21/823821 , H01L21/823878 , H01L27/0886 , H01L27/0924 , H01L29/0847 , H01L29/1054 , H01L29/66545 , H01L29/6656 , H01L29/66636 , H01L29/66795 , H01L29/7842 , H01L29/7851
摘要： FinFETs and methods of forming finFETs are described. According to some embodiments, a structure includes a channel region, first and second source/drain regions, a dielectric layer, and a gate electrode. The channel region includes semiconductor layers above a substrate. Each of the semiconductor layers is separated from neighboring ones of the semiconductor layers, and each of the semiconductor layers has first and second sidewalls. The first and second sidewalls are aligned along a first and second plane, respectively, extending perpendicularly to the substrate. The first and second source/drain regions are disposed on opposite sides of the channel region. The semiconductor layers extend from the first source/drain region to the second source/drain region. The dielectric layer contacts the first and second sidewalls of the semiconductor layers, and the dielectric layer extends into a region between the first plane and the second plane. The gate electrode is over the dielectric layer.
摘要翻译：描述FinFET和形成finFET的方法。根据一些实施例，结构包括沟道区，第一和第二源极/漏极区，电介质层和栅电极。沟道区域包括衬底上方的半导体层。每个半导体层与相邻的半导体层分离，并且每个半导体层具有第一和第二侧壁。第一和第二侧壁分别沿垂直于衬底延伸的第一和第二平面排列。第一和第二源极/漏极区域设置在沟道区域的相对侧上。半导体层从第一源极/漏极区域延伸到第二源极/漏极区域。电介质层接触半导体层的第一和第二侧壁，电介质层延伸到第一平面和第二平面之间的区域。栅电极在电介质层的上方。

5. 发明申请

US20150179454A1 FINFET DEVICE HAVING A STRAINED REGION 有权
标题翻译：具有应变区域的FINFET器件
公开(公告)号：US20150179454A1
公开(公告)日：2015-06-25
申请号：US14579774
申请日：2014-12-22
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Tsung-Lin Lee , Feng Yuan , Hung-Li Chiang , Chih Chieh Yeh
IPC分类号： H01L21/265 , H01L21/324 , H01L29/10 , H01L29/66
CPC分类号： H01L21/265 , H01L21/26506 , H01L21/2654 , H01L21/2658 , H01L21/26586 , H01L21/324 , H01L29/1054 , H01L29/66545 , H01L29/66795 , H01L29/7847
摘要： A method of fabricating a semiconductor device includes providing a substrate having a fin disposed thereon. A gate structure is formed on the fin. The gate structure interfaces at least two sides of the fin. A stress film is formed on the substrate including on the fin. The substrate including the stress film is annealed. The annealing provides a tensile strain in a channel region of the fin. For example, a compressive strain in the stress film may be transferred to form a tensile stress in the channel region of the fin.
摘要翻译：制造半导体器件的方法包括提供其上布置有翅片的衬底。在翅片上形成栅极结构。栅极结构与翅片的至少两侧相接。在包括翅片的基板上形成应力膜。将包括应力膜的基板退火。退火在翅片的通道区域中提供拉伸应变。例如，应力膜中的压缩应变可能被转移以在翅片的通道区域中形成拉伸应力。

6. 发明授权

US08747992B2 Non-uniform semiconductor device active area pattern formation 有权
公开(公告)号：US08747992B2
公开(公告)日：2014-06-10
申请号：US13917180
申请日：2013-06-13
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Lin Lee , Shao-Ming Yu
IPC分类号： D06N7/00
CPC分类号： H01L27/0207 , H01L21/823431 , H01L27/088 , H01L27/0886
摘要： In accordance with an embodiment, a semiconductor device comprises at least three active areas. The at least three active areas are proximate. Longitudinal axes of the at least three active areas are parallel, and each of the at least three active areas comprises an edge intersecting the longitudinal axis of the respective active area. The edges of the at least three active areas form an arc.

7. 发明授权

US08673709B2 FinFETs with multiple fin heights 有权
标题翻译： FinFET具有多个翅片高度
公开(公告)号：US08673709B2
公开(公告)日：2014-03-18
申请号：US13764549
申请日：2013-02-11
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Tsung-Lin Lee , Chih Chieh Yeh , Chang-Yun Chang , Feng Yuan
IPC分类号： H01L21/8234
CPC分类号： H01L29/66666 , H01L21/76 , H01L21/823431 , H01L27/0886 , H01L29/66795 , H01L29/785
摘要： An integrated circuit structure includes a semiconductor substrate, and a FinFET over the semiconductor substrate. The FinFET includes a semiconductor fin; a gate dielectric on a top surface and sidewalls of the semiconductor fin; a gate electrode on the gate dielectric; and a source/drain region at an end of the semiconductor fin. A first pair of shallow trench isolation (STI) regions includes portions directly underlying portions of the source/drain regions, wherein the first pair of STI regions is separated by, and adjoining a semiconductor strip. The first pair of STI regions further has first top surfaces. A second pair of STI regions comprises portions directly underlying the gate electrode, wherein the second pair of STI regions is separated from each other by, and adjoining, the semiconductor strip. The second pair of STI regions has second top surfaces higher than the first top surfaces.
摘要翻译：集成电路结构包括半导体衬底和半导体衬底上的FinFET。 FinFET包括半导体鳍片; 顶表面上的栅极电介质和半导体鳍片的侧壁; 栅电极上的栅电极; 以及在半导体鳍片的端部处的源极/漏极区域。第一对浅沟槽隔离（STI）区域包括直接在源极/漏极区域的下方部分的部分，其中第一对STI区域被分隔开并邻接半导体条带。第一对STI区域还具有第一顶面。第二对STI区域包括直接位于栅极电极下方的部分，其中第二对STI区域彼此分开并邻接半导体条带。第二对STI区域具有高于第一顶表面的第二顶表面。

8. 发明授权

US11569130B2 Fin field effect transistor (FinFET) device structure with dummy Fin structure 有权
公开(公告)号：US11569130B2
公开(公告)日：2023-01-31
申请号：US17031023
申请日：2020-09-24
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Tzung-Yi Tsai , Yen-Ming Chen , Tsung-Lin Lee , Chih-Chieh Yeh
IPC分类号： H01L21/8234 , H01L27/088
摘要： A fin field effect transistor (FinFET) device structure with dummy fin structures and method for forming the same are provided. The FinFET device structure includes an isolation structure over a substrate, and a first fin structure extended above the isolation structure. The fin field effect transistor (FinFET) device structure includes a second fin structure adjacent to the first fin structure, and a material layer formed over the fin structure. The material layer and the isolation structure are made of different materials, the material layer has a top surface with a top width and a bottom surface with a bottom width, and the bottom width is greater than the top width.

9. 发明授权

US10355108B2 Method of forming a fin field effect transistor comprising two etching steps to define a fin structure 有权
公开(公告)号：US10355108B2
公开(公告)日：2019-07-16
申请号：US15339258
申请日：2016-10-31
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Feng Yuan , Hung-Ming Chen , Tsung-Lin Lee , Chang-Yun Chang , Clement Hsingjen Wann
IPC分类号： H01L29/66 , H01L29/78 , H01L21/308 , H01L21/3065
摘要： An exemplary method of forming a fin field effect transistor that includes first and second etching processes to form a fin structure. The fin structure includes an upper portion and a lower portion separated at a transition. The upper portion has sidewalls that are substantially perpendicular to the major surface of the substrate. The lower portion has tapered sidewalls on opposite sides of the upper portion and a base having a second width larger than the first width.

10. 发明授权

US09601587B2 Semiconductor device having elevated structure 有权
公开(公告)号：US09601587B2
公开(公告)日：2017-03-21
申请号：US14603861
申请日：2015-01-23
申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
发明人： Sey-Ping Sun , Tsung-Lin Lee , Chin-Hsiang Lin , Chih-Hao Chang , Chen-Nan Yeh , Chao-An Jong
IPC分类号： H01L29/423 , H01L21/768 , H01L29/49 , H01L29/78 , H01L29/66
CPC分类号： H01L29/4232 , H01L21/76834 , H01L21/76849 , H01L21/76897 , H01L29/495 , H01L29/4966 , H01L29/66545 , H01L29/78
摘要： A semiconductor device includes a gate stack overlying a substrate. The semiconductor device further includes a spacer on sidewalls of the gate stack, where a top surface of the spacer is above a top surface of the gate stack. Additionally, the semiconductor device includes a protection layer overlying the gate stack and filling at least a portion of a space surrounded by the spacer above the top surface of the gate stack. Furthermore, the semiconductor device includes a contact hole over the spacer, where the contact hole extends over the gate stack, and where a sidewall of the contact hole has a step-wise shape.

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