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1. 发明授权

US08084352B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08084352B2
公开(公告)日：2011-12-27
申请号：US12131968
申请日：2008-06-03
申请人： Takeshi Harada , Junichi Shibata , Akira Ueki
发明人： Takeshi Harada , Junichi Shibata , Akira Ueki
IPC分类号： H01L21/4763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L21/76832 , H01L21/76834 , H01L21/76849 , H01L21/7685 , H01L21/76852 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： A high-density N-type diffusion layer 116 formed in a separation area 115 makes it possible to reduce a collector current flowing through a parasitic NPN transistor 102. Thus, a normal CMOS process can be used to provide a driving circuit and a data line driver which make it possible to improve resistance to possible noise occurring between adjacent terminals, while controlling a chip size.
摘要翻译：形成在分离区域115中的高密度N型扩散层116使得可以减少流过寄生NPN晶体管102的集电极电流。因此，可以使用正常的CMOS工艺来提供驱动电路和数据线驱动器，其可以在控制芯片尺寸的同时提高在相邻端子之间发生的可能的噪声的抵抗力。

2. 发明申请

US20080299758A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20080299758A1
公开(公告)日：2008-12-04
申请号：US12131968
申请日：2008-06-03
申请人： Takeshi Harada , Junichi Shibata , Akira Ueki
发明人： Takeshi Harada , Junichi Shibata , Akira Ueki
IPC分类号： H01L21/4763
CPC分类号： H01L23/5222 , H01L21/7682 , H01L21/76832 , H01L21/76834 , H01L21/76849 , H01L21/7685 , H01L21/76852 , H01L2221/1078 , H01L2924/0002 , H01L2924/00
摘要： A high-density N-type diffusion layer 116 formed in a separation area 115 makes it possible to reduce a collector current flowing through a parasitic NPN transistor 102. Thus, a normal CMOS process can be used to provide a driving circuit and a data line driver which make it possible to improve resistance to possible noise occurring between adjacent terminals, while controlling a chip size.
摘要翻译：形成在分离区域115中的高密度N型扩散层116使得可以减少流过寄生NPN晶体管102的集电极电流。因此，可以使用正常的CMOS工艺来提供驱动电路和数据线驱动器，其可以在控制芯片尺寸的同时提高在相邻端子之间发生的可能的噪声的抵抗力。

3. 发明授权

US08927416B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08927416B2
公开(公告)日：2015-01-06
申请号：US13274039
申请日：2011-10-14
申请人： Takeshi Harada , Junichi Shibata , Akira Ueki
发明人： Takeshi Harada , Junichi Shibata , Akira Ueki
IPC分类号： H01L21/768 , H01L23/22 , H01L23/532
CPC分类号： H01L23/53238 , H01L21/76826 , H01L21/76834 , H01L21/76849 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A first insulating film is formed on a semiconductor substrate, an interconnect groove is formed in the first insulating film, the inside of the interconnect groove is filled with a metal film, thereby forming a first interconnect. Then, a protective film is formed on the first insulating film and the first interconnect, and the surface of the protective film is exposed to reactive gas, thereby forming a reaction layer on an interface between the first interconnect and the protective film.
摘要翻译：第一绝缘膜形成在半导体衬底上，在第一绝缘膜中形成互连槽，互连槽的内部填充有金属膜，从而形成第一互连。然后，在第一绝缘膜和第一布线上形成保护膜，并且将保护膜的表面暴露于反应性气体，从而在第一互连和保护膜之间的界面上形成反应层。

4. 发明申请

US20120032333A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120032333A1
公开(公告)日：2012-02-09
申请号：US13274039
申请日：2011-10-14
申请人： Takeshi Harada , Junichi Shibata , Akira Ueki
发明人： Takeshi Harada , Junichi Shibata , Akira Ueki
IPC分类号： H01L23/52 , H01L21/768
CPC分类号： H01L23/53238 , H01L21/76826 , H01L21/76834 , H01L21/76849 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A first insulating film is formed on a semiconductor substrate, an interconnect groove is formed in the first insulating film, the inside of the interconnect groove is filled with a metal film, thereby forming a first interconnect. Then, a protective film is formed on the first insulating film and the first interconnect, and the surface of the protective film is exposed to reactive gas, thereby forming a reaction layer on an interface between the first interconnect and the protective film.
摘要翻译：第一绝缘膜形成在半导体衬底上，在第一绝缘膜中形成互连槽，互连槽的内部填充有金属膜，从而形成第一互连。然后，在第一绝缘膜和第一布线上形成保护膜，并且将保护膜的表面暴露于反应性气体，从而在第一互连和保护膜之间的界面上形成反应层。

5. 发明授权

US08035232B2 Semiconductor device including interconnects, vias connecting the interconnects and greater thickness of the liner film adjacent the vias 有权
标题翻译：包括互连的半导体器件，连接互连的通孔和邻近过孔的衬垫膜的较大厚度
公开(公告)号：US08035232B2
公开(公告)日：2011-10-11
申请号：US12437944
申请日：2009-05-08
申请人： Takeshi Harada , Junichi Shibata , Akira Ueki
发明人： Takeshi Harada , Junichi Shibata , Akira Ueki
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/7682 , H01L21/76829 , H01L21/76832 , H01L21/76834 , H01L23/5222 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An interlayer insulating film is formed on the upper surface of a semiconductor substrate, and lower-level interconnects are formed in the interlayer insulating film. A liner insulating film is formed on the upper surfaces of the interlayer insulating film and lower-level interconnects. An interlayer insulating film is formed on the upper surface of the liner insulating film. Upper-level interconnects are formed in the interlayer insulating film. The lower-level interconnects and the upper-level interconnects are connected with each other through vias. Parts of the liner insulating film formed in via-adjacent regions have a greater thickness than a part thereof formed outside the via-adjacent regions.
摘要翻译：在半导体衬底的上表面上形成层间绝缘膜，在层间绝缘膜中形成下层布线。衬层绝缘膜形成在层间绝缘膜和下层互连的上表面上。在衬垫绝缘膜的上表面上形成层间绝缘膜。在层间绝缘膜中形成上层布线。下层互连和上层互连通过通孔彼此连接。形成在通孔相邻区域中的衬垫绝缘膜的部分具有比形成在通孔相邻区域之外的部分更大的厚度。

6. 发明授权

US08034693B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08034693B2
公开(公告)日：2011-10-11
申请号：US12493673
申请日：2009-06-29
申请人： Junichi Shibata , Takeshi Harada , Akira Ueki
发明人： Junichi Shibata , Takeshi Harada , Akira Ueki
IPC分类号： H01L21/678
CPC分类号： H01L21/76816 , H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing one of regions between the plurality of wirings, on the insulating film and the plurality of wirings, forming an air gap trench by removing the insulating film from the selectively exposed one of the regions between the plurality of wirings by etching using the resist mask, and forming an air gap in the air gap trench by depositing an inter-layer insulating film over the plurality of wirings after removal of the resist mask.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成绝缘膜，在绝缘膜中形成多个布线沟槽，在多个布线沟槽中形成多个布线，形成具有开口的抗蚀剂掩模用于选择性地暴露多个布线中的一个区域，在绝缘膜和多个布线之间，通过使用抗蚀剂通过蚀刻从多个布线中的选择性暴露的一个区域中去除绝缘膜而形成气隙沟槽掩模，并且在除去抗蚀剂掩模之后，在多个布线之间沉积层间绝缘膜，在气隙沟槽中形成气隙。

7. 发明申请

US20090263951A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20090263951A1
公开(公告)日：2009-10-22
申请号：US12493673
申请日：2009-06-29
申请人： Junichi Shibata , Takeshi Harada , Akira Ueki
发明人： Junichi Shibata , Takeshi Harada , Akira Ueki
IPC分类号： H01L21/768 , H01L21/764
CPC分类号： H01L21/76816 , H01L21/7682 , H01L23/5222 , H01L2924/0002 , H01L2924/00
摘要： A method for fabricating a semiconductor device includes the steps of forming an insulating film on a semiconductor substrate, forming a plurality of wiring trenches in the insulating film, forming a plurality of wirings in the plurality of wiring trenches, forming a resist mask having an opening for selectively exposing one of regions between the plurality of wirings, on the insulating film and the plurality of wirings, forming an air gap trench by removing the insulating film from the selectively exposed one of the regions between the plurality of wirings by etching using the resist mask, and forming an air gap in the air gap trench by depositing an inter-layer insulating film over the plurality of wirings after removal of the resist mask.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成绝缘膜，在绝缘膜中形成多个布线沟槽，在多个布线沟槽中形成多个布线，形成具有开口的抗蚀剂掩模用于选择性地暴露多个布线中的一个区域，在绝缘膜和多个布线之间，通过使用抗蚀剂通过蚀刻从多个布线中的选择性暴露的一个区域中去除绝缘膜而形成气隙沟槽掩模，并且在除去抗蚀剂掩模之后，在多个布线之间沉积层间绝缘膜，在气隙沟槽中形成气隙。

8. 发明申请

US20080299763A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20080299763A1
公开(公告)日：2008-12-04
申请号：US12059768
申请日：2008-03-31
申请人： Akira Ueki , Takeshi Harada , Atsushi Ishii
发明人： Akira Ueki , Takeshi Harada , Atsushi Ishii
IPC分类号： H01L21/768
CPC分类号： H01L21/7682 , H01L21/76849 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： After a first insulating film is formed on a substrate, a wiring groove is formed in the first insulating film, and then a wire is formed inside the wiring groove. Subsequently, a protection film is formed on the first insulating film and on the wire, and then a hard mask film is formed on the protection film. After that, the hard mask film is patterned. Subsequently, the protection film and the first insulating film are partially removed using the patterned hard mask film to form an air gap groove, and then a second insulating film is formed to close an upper portion of the air gap groove for forming an air gap.
摘要翻译：在基板上形成第一绝缘膜之后，在第一绝缘膜中形成布线槽，然后在布线槽内部形成布线。随后，在第一绝缘膜和导线上形成保护膜，然后在保护膜上形成硬掩模膜。之后，硬掩模膜被图案化。随后，使用图案化的硬掩模膜部分地去除保护膜和第一绝缘膜，以形成气隙槽，然后形成第二绝缘膜以封闭用于形成气隙的气隙槽的上部。

9. 发明授权

US07741228B2 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07741228B2
公开(公告)日：2010-06-22
申请号：US12059768
申请日：2008-03-31
申请人： Akira Ueki , Takeshi Harada , Atsushi Ishii
发明人： Akira Ueki , Takeshi Harada , Atsushi Ishii
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/7682 , H01L21/76849 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： After a first insulating film is formed on a substrate, a wiring groove is formed in the first insulating film, and then a wire is formed inside the wiring groove. Subsequently, a protection film is formed on the first insulating film and on the wire, and then a hard mask film is formed on the protection film. After that, the hard mask film is patterned. Subsequently, the protection film and the first insulating film are partially removed using the patterned hard mask film to form an air gap groove, and then a second insulating film is formed to close an upper portion of the air gap groove for forming an air gap.
摘要翻译：在基板上形成第一绝缘膜之后，在第一绝缘膜中形成布线槽，然后在布线槽内形成布线。随后，在第一绝缘膜和导线上形成保护膜，然后在保护膜上形成硬掩模膜。之后，硬掩模膜被图案化。随后，使用图案化的硬掩模膜部分地去除保护膜和第一绝缘膜，以形成气隙槽，然后形成第二绝缘膜以封闭用于形成气隙的气隙槽的上部。

10. 发明申请

US20090302475A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090302475A1
公开(公告)日：2009-12-10
申请号：US12539836
申请日：2009-08-12
申请人： Hayato Korogi , Takeshi Harada , Akira Ueki
发明人： Hayato Korogi , Takeshi Harada , Akira Ueki
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L23/53238 , H01L21/7682 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first interlayer insulating film, and a plurality of first interconnects formed in the first interlayer insulating film. A void is selectively formed between adjacent ones of the plurality of first interconnects in the first interlayer insulating film, and a cap insulating film is formed in a region located over the void and between the interconnects. Respective widths of a lower end and an upper end of the void are substantially the same as a gap between the interconnects located adjacent to the void, and the lower end of the void is located lower than lower ends of the first interconnects located adjacent to the void.
摘要翻译：半导体器件包括第一层间绝缘膜和形成在第一层间绝缘膜中的多个第一互连。在第一层间绝缘膜中的多个第一互连中的相邻的第一互连之间选择性地形成空隙，并且在位于空隙之上和互连之间的区域中形成帽绝缘膜。空隙的下端和上端的宽度与位于邻近空隙的互连件之间的间隙基本上相同，并且空隙的下端位于比位于邻近的第一互连的下端无效。

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