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1. 发明授权

US11640733B2 Autonomous driving system component fault prediction 有权
公开(公告)号：US11640733B2
公开(公告)日：2023-05-02
申请号：US16954755
申请日：2018-12-05
申请人： Tesla, Inc.
发明人： Atchyuth Gorti , David Glasco , Daniel William Bailey
IPC分类号： G07C5/08 , G06N20/00 , B60W60/00
摘要： A vehicular autonomous driving system includes a fault prediction unit, including a processor and memory, configured to predict a potential future fault condition by: monitoring performance data associated with the plurality of autonomous driving components; comparing the performance data associated with the plurality of autonomous driving components to a plurality of performance thresholds; and determining the potential future fault condition for one of the plurality of autonomous driving components, when the performance data associated with the one of the plurality of autonomous driving components compares unfavorably to a corresponding one of the plurality of performance thresholds.

2. 发明申请

US20210385073A1 AUTONOMOUS DRIVING CONTROLLER ENCRYPTED COMMUNICATIONS 有权
公开(公告)号：US20210385073A1
公开(公告)日：2021-12-09
申请号：US17301956
申请日：2021-04-20
申请人： Tesla, Inc.
发明人： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
IPC分类号： H04L9/08 , B60W50/02
摘要： An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

3. 发明申请

US20190205218A1 PARALLEL PROCESSING SYSTEM RUNTIME STATE RELOAD 审中-公开
公开(公告)号：US20190205218A1
公开(公告)日：2019-07-04
申请号：US15979771
申请日：2018-05-15
申请人： Tesla, Inc.
发明人： Daniel William Bailey , David Glasco
IPC分类号： G06F11/14 , G06F9/52
摘要： A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

4. 发明申请

US20210263811A1 PARALLEL PROCESSING SYSTEM RUNTIME STATE RELOAD 有权
公开(公告)号：US20210263811A1
公开(公告)日：2021-08-26
申请号：US17066288
申请日：2020-10-08
申请人： Tesla, Inc.
发明人： Daniel William Bailey , David Glasco
IPC分类号： G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/07 , G06F11/30 , G06F11/20
摘要： A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

5. 发明申请

US20230102197A1 PARALLEL PROCESSING SYSTEM RUNTIME STATE RELOAD 有权
公开(公告)号：US20230102197A1
公开(公告)日：2023-03-30
申请号：US18061620
申请日：2022-12-05
申请人： Tesla, Inc.
发明人： Daniel William Bailey , David Glasco
IPC分类号： G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/07 , G06F11/30 , G06F11/20
摘要： A parallel processing system includes at least three parallel processors, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

6. 发明授权

US11526409B2 Parallel processing system runtime state reload 有权
公开(公告)号：US11526409B2
公开(公告)日：2022-12-13
申请号：US17066288
申请日：2020-10-08
申请人： Tesla, Inc.
发明人： Daniel William Bailey , David Glasco
IPC分类号： G06F11/00 , G06F11/07 , G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/30 , G06F11/20
摘要： A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

7. 发明授权

US10802929B2 Parallel processing system runtime state reload 有权
公开(公告)号：US10802929B2
公开(公告)日：2020-10-13
申请号：US15979771
申请日：2018-05-15
申请人： Tesla, Inc.
发明人： Daniel William Bailey , David Glasco
IPC分类号： G06F11/00 , G06F11/14 , G06F9/52 , G06F11/267 , G06F11/18 , G06F11/16 , G06F11/07 , G06F11/30 , G06F11/20
摘要： A parallel processing system includes at least three processors operating in parallel, state monitoring circuitry, and state reload circuitry. The state monitoring circuitry couples to the at least three parallel processors and is configured to monitor runtime states of the at least three parallel processors and identify a first processor of the at least three parallel processors having at least one runtime state error. The state reload circuitry couples to the at least three parallel processors and is configured to select a second processor of the at least three parallel processors for state reload, access a runtime state of the second processor, and load the runtime state of the second processor into the first processor. Monitoring and reload may be performed only on sub-systems of the at least three parallel processors. During reload, clocks and supply voltages of the processors may be altered. The state reload may relate to sub-systems.

8. 发明申请

US20190334706A1 AUTONOMOUS DRIVING CONTROLLER ENCRYPTED COMMUNICATIONS 审中-公开
公开(公告)号：US20190334706A1
公开(公告)日：2019-10-31
申请号：US16388352
申请日：2019-04-18
申请人： TESLA, INC.
发明人： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
IPC分类号： H04L9/08 , B60W50/02
摘要： An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

9. 发明授权

US11005649B2 Autonomous driving controller encrypted communications 有权
公开(公告)号：US11005649B2
公开(公告)日：2021-05-11
申请号：US16388352
申请日：2019-04-18
申请人： TESLA, INC.
发明人： Thaddeus Fortenberry , Samuel Douglas Crowder , Patryk Kaminski , Daniel William Bailey , David Glasco
IPC分类号： H04L9/08 , B60W50/02 , B60W50/00
摘要： An autonomous driving controller includes a plurality of parallel processors operating on common input data received from the plurality of autonomous driving sensors. Each of the plurality of parallel processors includes communication circuitry, a general processor, a security processor subsystem (SCS), and a safety subsystem (SMS). The communication circuitry supports communications between the plurality of parallel processors, including inter-processor communications between the general processors of the plurality of parallel processors, communications between the SCSs of the plurality of parallel processors using SCS cryptography, and communications between the SMSs of the plurality of parallel processors using SMS cryptography, the SMS cryptography differing from the SCS cryptography. The SCS and/or the SMS may each include dedicated hardware and/or memory to support the communications.

10. 发明授权

US10921849B2 Clock sprinklers for a system on a chip 有权
公开(公告)号：US10921849B2
公开(公告)日：2021-02-16
申请号：US15974785
申请日：2018-05-09
申请人： Tesla, Inc.
发明人： Daniel William Bailey
IPC分类号： G06F1/00 , G06F1/10 , G06F15/78 , G06F1/14
摘要： A System-on-a-Chip includes a plurality of processing systems and channel circuitry servicing the plurality of processing systems. The channel circuitry includes a clock sprinkler circuit, a clock source, first direction data path circuitry and second direction data path circuitry. A clock sprinkler is a clock signal that propagates in a first direction only, from a source to all destinations. The first direction data path circuitry includes a plurality of first direction data flip flops and first direction combinational logic that service data flow in the first direction. The second direction data path circuitry includes a plurality of second direction data flip flops and second direction combinational logic that service data flow in the second direction. Clock/data skew in a second direction is greater than clock/data skew in a first direction, the first direction data flip flops are located based upon the clock/data skew in the first direction and the second direction data flip flops are located based upon the clock/data skew in the second direction.

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